Patents by Inventor Hidetoshi Ishibashi

Hidetoshi Ishibashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10204886
    Abstract: A semiconductor device includes semiconductor chips fixed to a board, an insulating plate having a through-hole formed therein, a first lower conductor including a lower main body formed on the lower surface of the insulating plate and soldered to any of the semiconductor chips, and a lower protrusion portion that connects with the lower main body, and extends to the outside of the insulating plate, a second lower conductor formed on a lower surface of the insulating plate and soldered to any of the semiconductor chips, an upper conductor including an upper main body formed on the upper surface of the insulating plate, and an upper protrusion portion that connects with the upper main body and extends to the outside of the insulating plate, and a connection portion provided in the through-hole and connects the upper main body and the second lower conductor.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: February 12, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Yoshida, Yuji Imoto, Hidetoshi Ishibashi, Daisuke Murata, Kenta Nakahara, Seiji Oka, Junji Fujino, Nobuhiro Asaji
  • Publication number: 20180294253
    Abstract: A semiconductor device includes semiconductor chips fixed to a board, an insulating plate having a through-hole formed therein, a first lower conductor including a lower main body formed on the lower surface of the insulating plate and soldered to any of the semiconductor chips, and a lower protrusion portion that connects with the lower main body, and extends to the outside of the insulating plate, a second lower conductor formed on a lower surface of the insulating plate and soldered to any of the semiconductor chips, an upper conductor including an upper main body formed on the upper surface of the insulating plate, and an upper protrusion portion that connects with the upper main body and extends to the outside of the insulating plate, and a connection portion provided in the through-hole and connects the upper main body and the second lower conductor.
    Type: Application
    Filed: January 29, 2016
    Publication date: October 11, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroshi YOSHIDA, Yuji IMOTO, Hidetoshi ISHIBASHI, Daisuke MURATA, Kenta NAKAHARA, Seiji Oka, Junji FUJINO, Nobuhiro ASAJI
  • Patent number: 10068819
    Abstract: A relay substrate in which a circuit pattern and an external electrode are integrated on a insulating plate is used in the semiconductor device. Such configuration makes it possible to reduce a resistance in a current path while preventing the problems occurring when the external electrode is soldered on the semiconductor chip.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: September 4, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Seiji Oka, Hiroshi Yoshida, Hidetoshi Ishibashi, Yuji Imoto, Daisuke Murata, Kenta Nakahara
  • Patent number: 10026670
    Abstract: A power module includes: a relay substrate including a first conductor layer provided on a front surface and a second conductor layer provided on a back surface; copper blocks provided in holes penetrating through the relay substrate in a thickness direction and connecting the first conductor layer to the second conductor layer; semiconductor devices wherein each semiconductor device includes a main electrode provided at a location facing an end face of the corresponding copper block and only one copper block is electrically connected to one main electrode; an insulating substrate connected to back-surfaces of the semiconductor devices via joining materials; and a sealer sealing the relay substrate, the copper blocks, and the semiconductor devices.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: July 17, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Daisuke Murata, Hiroshi Yoshida, Hidetoshi Ishibashi
  • Patent number: 9979105
    Abstract: A power semiconductor device includes: an outer case; at least one press-fit terminal buried in a top surface of the outer case; and a plurality of supporting portions formed so as to protrude from the top surface of the outer case. A top end of the press-fit terminal protrudes more than top surfaces of the supporting portions from the top surface of the outer case.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 22, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Minoru Egusa, Hidetoshi Ishibashi, Yoshitaka Otsubo, Hiroyuki Masumoto, Hiroshi Kawata
  • Publication number: 20170372978
    Abstract: A relay substrate in which a circuit pattern and an external electrode are integrated on a insulating plate is used in the semiconductor device. Such configuration makes it possible to reduce a resistance in a current path while preventing the problems occurring when the external electrode is soldered on the semiconductor chip.
    Type: Application
    Filed: February 13, 2017
    Publication date: December 28, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Seiji OKA, Hiroshi YOSHIDA, Hidetoshi ISHIBASHI, Yuji IMOTO, Daisuke MURATA, Kenta NAKAHARA
  • Patent number: 9735100
    Abstract: A semiconductor device according to the present invention includes a plurality of semiconductor chips, a plate electrode disposed on the plurality of semiconductor chips for connecting the plurality of semiconductor chips, and an electrode disposed on the plate electrode. The electrode has a plurality of intermittent bonding portions to be bonded to the plate electrode and a protruded portion which is protruded erectly from the bonding portions. The protruded portion has an ultrasonic bonding portion which is parallel with the bonding portion and is ultrasonic bonded to an external electrode.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: August 15, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hidetoshi Ishibashi, Yoshihiro Yamaguchi, Naoki Yoshimatsu, Hidehiro Koga
  • Patent number: 9583407
    Abstract: A first conductor layer is provided on a first surface of an insulating plate, and has a first volume. A second conductor layer is provided on a second surface of the insulating plate, and has a second volume. A third conductor layer is provided on a second surface of the insulating plate, and has a second volume. The third conductor layer has a mounting region thicker than the second conductor layer. The sum of the second and third volumes is greater than or equal to 70% and smaller than or equal to 130% of the first volume. A semiconductor chip is provided on the mounting region. A sealing part is formed of an insulator, and seals the semiconductor chip within a case.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: February 28, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Yoshida, Yoshitaka Otsubo, Hidetoshi Ishibashi, Kenta Nakahara
  • Publication number: 20160336245
    Abstract: A power semiconductor device includes: an outer case; at least one press-fit terminal buried in a top surface of the outer case; and a plurality of supporting portions formed so as to protrude from the top surface of the outer case. A top end of the press-fit terminal protrudes more than top surfaces of the supporting portions from the top surface of the outer case.
    Type: Application
    Filed: May 3, 2016
    Publication date: November 17, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Minoru EGUSA, Hidetoshi ISHIBASHI, Yoshitaka OTSUBO, Hiroyuki MASUMOTO, Hiroshi KAWATA
  • Patent number: 9484294
    Abstract: A semiconductor device of the present invention includes a bonding target and an electrode terminal bonded to the bonding target. The electrode terminal and the bonding target are bonded by ultrasonic bonding at a bonding surface to be subjected to bonding. The electrode terminal includes a penetrating hollow part surrounded on at least two sides by the bonding surface.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: November 1, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yutaka Yoneda, Hidetoshi Ishibashi, Masao Kikuchi, Tatsunori Yanagimoto
  • Publication number: 20160315023
    Abstract: A first conductor layer is provided on a first surface of an insulating plate, and has a first volume. A second conductor layer is provided on a second surface of the insulating plate, and has a second volume. A third conductor layer is provided on a second surface of the insulating plate, and has a second volume. The third conductor layer has a mounting region thicker than the second conductor layer. The sum of the second and third volumes is greater than or equal to 70% and smaller than or equal to 130% of the first volume. A semiconductor chip is provided on the mounting region. A sealing part is formed of an insulator, and seals the semiconductor chip within a case.
    Type: Application
    Filed: November 30, 2015
    Publication date: October 27, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroshi YOSHIDA, Yoshitaka OTSUBO, Hidetoshi ISHIBASHI, Kenta NAKAHARA
  • Publication number: 20160133712
    Abstract: A semiconductor device of the present invention includes a bonding target and an electrode terminal bonded to the bonding target. The electrode terminal and the bonding target are bonded by ultrasonic bonding at a bonding surface to be subjected to bonding. The electrode terminal includes a penetrating hollow part surrounded on at least two sides by the bonding surface.
    Type: Application
    Filed: August 19, 2015
    Publication date: May 12, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yutaka YONEDA, Hidetoshi ISHIBASHI, Masao KIKUCHI, Tatsunori YANAGIMOTO
  • Publication number: 20150237718
    Abstract: A circuit board having a power semiconductor element mounted thereon includes an insulating plate, a bonding pattern, a circuit pattern, and a pad plate. The insulating plate is made of aluminum nitride ceramic and has a first surface and a second surface opposite to the first surface. The bonding pattern is bonded to the first surface of the insulating plate and made of any of aluminum and aluminum alloy. The circuit pattern is bonded to the second surface of the insulating plate and made of any of aluminum and aluminum alloy. The pad plate is bonded to the circuit pattern, only partially covers the circuit pattern, and is made of any of copper and copper alloy.
    Type: Application
    Filed: November 7, 2014
    Publication date: August 20, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshihiro YAMAGUCHI, Tatsunori YANAGIMOTO, Hidetoshi ISHIBASHI
  • Publication number: 20140217569
    Abstract: A semiconductor device according to the present invention includes a plurality of semiconductor chips, a plate electrode disposed on the plurality of semiconductor chips for connecting the plurality of semiconductor chips, and an electrode disposed on the plate electrode. The electrode has a plurality of intermittent bonding portions to be bonded to the plate electrode and a protruded portion which is protruded erectly from the bonding portions. The protruded portion has an ultrasonic bonding portion which is parallel with the bonding portion and is ultrasonic bonded to an external electrode.
    Type: Application
    Filed: October 10, 2013
    Publication date: August 7, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hidetoshi ISHIBASHI, Yoshihiro YAMAGUCHI, Naoki YOSHIMATSU, Hidehiro KOGA
  • Patent number: 8339536
    Abstract: A display module is equipped with a display panel having a display screen for displaying images on a front side of the panel. A panel chassis is provided on a rear side of the display panel with respect to the display screen. The display module is assembled with a plurality of fixing members. Each fixing member has a panel holder to hold the display panel as covering a portion of a periphery of the display screen and a chassis coupling member coupled to the panel chassis so that the display panel is interposed between the panel holder and the panel chassis.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: December 25, 2012
    Assignee: JVC Kenwood Corporation
    Inventors: Michitaka Sakamoto, Shigehiro Masuji, Hidetoshi Ishibashi, Takenori Yaguchi
  • Publication number: 20110049000
    Abstract: A thin display apparatus is packed in a package box. A reinforced plate is attached to the display apparatus. The reinforced plate has a first end portion, a second end portion, a middle bent portion and a buffer member fixed to the first end portion. The first and second portions face each other with the bent portion located therebetween and connected thereto. The reinforced plate is attached to the display apparatus so that the bent portion is set on a top portion of the display apparatus at a top side, the buffer member is positioned at a front side of the display apparatus as facing a display screen and the second portion is positioned at a rear side of the display apparatus. A cushion member is attached to the reinforced plate so that the cushion member is set on the bent portion set on the top portion.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 3, 2011
    Applicant: Victor Company of Japan, Ltd.
    Inventor: Hidetoshi Ishibashi
  • Publication number: 20100301714
    Abstract: A cabinet includes a first and a second sub-cabinet having a first and a second inner wall, respectively. The sub-cabinets are fixed to each other so that the inner walls face each other with a gap of a specific distance therebetween. A first and a second rib are laid on the first and second inner walls, respectively. The first and second ribs have an almost same shape as the outer shape of the first and second sub-cabinets, respectively. The first rib is placed outside the second rib at least in a specific direction among upper, lower, left and right directions of the sub-cabinets. The first and second ribs have a height in the specific direction, the height being greater than at least a half of the specific distance.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 2, 2010
    Applicant: Victor Company of Japan. Ltd. a Corporation of Japan
    Inventors: Hidetoshi Ishibashi, Masaru Matsuzawa, Mikio Okumura
  • Publication number: 20100220257
    Abstract: A display module is equipped with a display panel having a display screen for displaying images on a front side of the panel. A panel chassis is provided on a rear side of the display panel with respect to the display screen. The display module is assembled with a plurality of fixing members. Each fixing member has a panel holder to hold the display panel as covering a portion of a periphery of the display screen and a chassis coupling member coupled to the panel chassis so that the display panel is interposed between the panel holder and the panel chassis.
    Type: Application
    Filed: February 22, 2010
    Publication date: September 2, 2010
    Applicant: Victor Company of Japan, Ltd. a corporation of Japan
    Inventors: Michitaka Sakamoto, Shigehiro Masuji, Hidetoshi Ishibashi, Takenori Yaguchi
  • Publication number: 20090225254
    Abstract: A display module includes a base plate having a front surface section and a rear surface section that has at least one edge section, a display panel provided on the front surface section of the base plate, a circuit board provided in a specific zone of the rear surface section of the base plate in which the specific zone is closer to the edge section of the rear surface section of the base plate than a center of the rear surface section is, and a protecting cover to protect the circuit board and the base plate. The protecting cover has a higher section and a lower section that is closer to the base plate than the higher section is so that the higher section at least partially covers the circuit board while the lower section at least partially covers the base plate. The higher and lower sections give a space inside the display module but outside the protecting cover.
    Type: Application
    Filed: March 9, 2009
    Publication date: September 10, 2009
    Applicant: Victor Company of Japan, Ltd.
    Inventors: Masaru Matsuzawa, Michitaka Sakamoto, Hidetoshi Ishibashi, Shigehiro Masuji