Patents by Inventor Hidetoshi Koyama

Hidetoshi Koyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230270604
    Abstract: An absorber with a top sheet, covering the other surface of the absorber with a back sheet, and attaching a hook member of a mechanical fastener to each of a front side and a back side of the back sheet. The hook member is formed of a sheet-like base portion and a large number of hook portions. Each of the hook portions has a support column extending from the base portion to a side opposite to the back sheet and a protruding portion which is located at an end of the support column and in which a length of a protrusion extending toward a distal end portion side of each of the front side and the back side is longer than a length of a protrusion extending toward a crotch portion.
    Type: Application
    Filed: May 25, 2021
    Publication date: August 31, 2023
    Applicant: DAIO PAPER CORPORATION
    Inventor: Hidetoshi Koyama
  • Patent number: 11538921
    Abstract: A source electrode (5), a drain electrode (6) and a T-shaped gate electrode (9) are formed on a GaN-based semiconductor layer (3,4) to form a transistor. An insulating film (10,11) covering the T-shaped gate electrode (9) is formed. A property of the transistor is evaluated to obtain an evaluation result. A film type, a film thickness or a dielectric constant of the insulating film (10,11) is adjusted in accordance with the evaluation result to make a property of the transistor close to a target property.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: December 27, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hidetoshi Koyama
  • Publication number: 20210059875
    Abstract: To make gel blocking less likely to occur, to enable and improve liquid absorption speed and absorption capability and to enable reversion to be prevented, without impairing the feeling when worn. An absorbent body is provided with a water-absorbent fiber stack including pulp fibers and a highly water-absorbent polymer, and a cover sheet covering at least a skin-facing surface of the water-absorbent fiber stack. Multiple protruding portions which protrude outward, and recessed portions that are recessed and are adjacent to the protruding portions are formed on the non-skin facing surface of the cover sheet, and the water-absorbent fiber stacks are stacked in the recessed portions.
    Type: Application
    Filed: February 1, 2019
    Publication date: March 4, 2021
    Applicant: DAIO PAPER CORPORATION
    Inventor: Hidetoshi KOYAMA
  • Publication number: 20200243667
    Abstract: A source electrode (5), a drain electrode (6) and a T-shaped gate electrode (9) are formed on a GaN-based semiconductor layer (3,4) to form a transistor. An insulating film (10,11) covering the T-shaped gate electrode (9) is formed. A property of the transistor is evaluated to obtain an evaluation result. A film type, a film thickness or a dielectric constant of the insulating film (10,11) is adjusted in accordance with the evaluation result to make a property of the transistor close to a target property.
    Type: Application
    Filed: May 15, 2017
    Publication date: July 30, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hidetoshi KOYAMA
  • Patent number: 9640647
    Abstract: A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 2, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroyuki Okazaki, Kenichiro Kurahashi, Hidetoshi Koyama, Toshiaki Kitano, Yoshitaka Kamo
  • Publication number: 20170077275
    Abstract: A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.
    Type: Application
    Filed: May 3, 2016
    Publication date: March 16, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki OKAZAKI, Kenichiro KURAHASHI, Hidetoshi KOYAMA, Toshiaki KITANO, Yoshitaka KAMO
  • Patent number: 9355937
    Abstract: A semiconductor device includes a semiconductor substrate, a first metal layer, a barrier metal layer, and a second metal layer. The semiconductor substrate includes a front surface and a back surface. A semiconductor element and an electrode of the semiconductor element are located on the front surface. An opening in the back surface reaches a lower surface of the electrode, and the opening is defined by a side surface and a bottom surface. The first metal layer covers the side surface and the bottom surface. The barrier metal layer covers the first metal layer in the opening. The second metal layer is in contact with solder in the opening and is closer to the electrode than parts of the barrier metal layer. The second metal layer is laminated on the barrier metal layer and covers at least a part of the barrier metal layer in the opening.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: May 31, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Hidetoshi Koyama
  • Patent number: 9159654
    Abstract: A semiconductor device includes a semiconductor substrate having opposed main and back surfaces; first and second electrodes in a device region of the substrate, and spaced apart from each other; a metal film on the main surface and joined to the second electrode; an air gap between part of the main surface and the metal film, enveloping the first electrode, and having an opening; a cured resin closing the opening; a liquid repellent film increasing contact angle of the resin, relative to contact angles on the substrate and the metal film; a first metal film joined to the metal film, covering the metal film and the cured resin, and joined to an outer peripheral region of the substrate, at a periphery of the device region; and a second metal film on the back surface and connected to the first electrode through a via hole penetrating the substrate.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: October 13, 2015
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Youichi Nogami, Hidetoshi Koyama, Yoshitsugu Yamamoto
  • Patent number: 9117896
    Abstract: A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlxGa1-xN (0?x?1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlyGa1-yN (0?y?1, x?y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlxGa1-xN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: August 25, 2015
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroyuki Okazaki, Yoshitaka Kamo, Yoichi Nogami, Hidetoshi Koyama, Shinichi Miyakuni
  • Publication number: 20150155224
    Abstract: A semiconductor device includes a semiconductor substrate, a first metal layer, a barrier metal layer, and a second metal layer. The semiconductor substrate includes a front surface and a back surface. A semiconductor element and an electrode of the semiconductor element are located on the front surface. An opening in the back surface reaches a lower surface of the electrode, and the opening is defined by a side surface and a bottom surface. The first metal layer covers the side surface and the bottom surface. The barrier metal layer covers the first metal layer in the opening The second metal layer is in contact with solder in the opening and is closer to the electrode than parts of the barrier metal layer.
    Type: Application
    Filed: August 22, 2014
    Publication date: June 4, 2015
    Inventor: Hidetoshi Koyama
  • Publication number: 20150084103
    Abstract: A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlxGa1-xN (0?x?1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlyGa1-yN (0?y?1, x?y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlxGa1-xN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.
    Type: Application
    Filed: June 4, 2014
    Publication date: March 26, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki Okazaki, Yoshitaka Kamo, Yoichi Nogami, Hidetoshi Koyama, Shinichi Miyakuni
  • Publication number: 20150054137
    Abstract: A semiconductor device includes a semiconductor substrate having opposed main and back surfaces; first and second electrodes in a device region of the substrate, and spaced apart from each other; a metal film on the main surface and joined to the second electrode; an air gap between part of the main surface and the metal film, enveloping the first electrode, and having an opening; a cured resin closing the opening; a liquid repellent film increasing contact angle of the resin, relative to contact angles on the substrate and the metal film; a first metal film joined to the metal film, covering the metal film and the cured resin, and joined to an outer peripheral region of the substrate, at a periphery of the device region; and a second metal film on the back surface and connected to the first electrode through a via hole penetrating the substrate.
    Type: Application
    Filed: October 2, 2014
    Publication date: February 26, 2015
    Inventors: Youichi Nogami, Hidetoshi Koyama, Yoshitsugu Yamamoto
  • Patent number: 8878333
    Abstract: A semiconductor device includes: a semiconductor substrate having a main surface; an electrode in a device region on the main surface; a metal wiring on the main surface and having a first end connected to the electrode; an electrode pad outside the device region and spaced from the metal wiring; an air gap between the main surface and an air gap forming film on the main surface, enveloping the first end of the metal wiring and the electrode, and having a first opening; a resin closing the first opening and covering a second end of the metal wiring; a liquid repellent film facing the air gap and increasing contact angle of the resin, when liquid, relative to contact angles on the semiconductor substrate and the air gap forming film; and a metal film connecting the metal wiring to the electrode pad through a second opening located in the resin.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: November 4, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Youichi Nogami, Hidetoshi Koyama, Yoshitsugu Yamamoto
  • Patent number: 8524601
    Abstract: A method of manufacturing a semiconductor device includes forming an insulating film on a surface of a semiconductor layer, forming a resist on a surface of the insulating film, the resist having an opening, forming a hardened layer on an inner circumference of the resist by attaching a pattern shrinking agent to the resist, the pattern shrinking agent undergoing a cross-linking reaction with the resist, etching the insulating film using the resist and the hardened layer as masks, removing the hardened layer, and forming a metal layer on a surface of the semiconductor layer, on a surface of the insulating film, and on a surface of the resist. The method further includes removing the resist and the portion of the metal layer on the surface of the resist by lift-off.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: September 3, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichiro Kurahashi, Hidetoshi Koyama, Kazuyuki Onoe
  • Publication number: 20130056875
    Abstract: A semiconductor device includes: a semiconductor substrate having a main surface; an electrode in a device region on the main surface; a metal wiring on the main surface and having a first end connected to the electrode; an electrode pad outside the device region and spaced from the metal wiring; an air gap between the main surface and an air gap forming film on the main surface, enveloping the first end of the metal wiring and the electrode, and having a first opening; a resin closing the first opening and covering a second end of the metal wiring; a liquid repellent film facing the air gap and increasing contact angle of the resin, when liquid, relative to contact angles on the semiconductor substrate and the air gap forming film; and a metal film connecting the metal wiring to the electrode pad through a second opening located in the resin.
    Type: Application
    Filed: July 10, 2012
    Publication date: March 7, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Youichi NOGAMI, Hidetoshi KOYAMA, Yoshitsugu YAMAMOTO
  • Publication number: 20120208365
    Abstract: A method of manufacturing a semiconductor device includes forming an insulating film on a surface of a semiconductor layer, forming a resist on a surface of the insulating film, the resist having an opening, forming a hardened layer on an inner circumference of the resist by attaching a pattern shrinking agent to the resist, the pattern shrinking agent undergoing a cross-linking reaction with the resist, etching the insulating film using the resist and the hardened layer as masks, removing the hardened layer, and forming a metal layer on a surface of the semiconductor layer, on a surface of the insulating film, and on a surface of the resist. The method further includes removing the resist and the portion of the metal layer on the surface of the resist by lift-off.
    Type: Application
    Filed: December 22, 2011
    Publication date: August 16, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichiro KURAHASHI, Hidetoshi Koyama, Kazuyuki Onoe
  • Patent number: 8008667
    Abstract: A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconductor layer is disposed on the first semiconductor layer covering the first semiconductor element. The semiconductor device also includes a second semiconductor element located in the second semiconductor layer. The semiconductor device also includes a wire extending within the second semiconductor layer and electrically connecting the first and second semiconductor elements.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: August 30, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hidetoshi Koyama, Yoshitaka Kamo
  • Patent number: 7851831
    Abstract: A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. A first portion of the gate electrode layer, in contact with the nitride semiconductor layer, has a higher nitrogen mole fraction than a second portion of the gate electrode layer.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: December 14, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hidetoshi Koyama, Yoshitaka Kamo, Toshihiko Shiga
  • Publication number: 20090014728
    Abstract: A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconductor layer is disposed on the first semiconductor layer covering the first semiconductor element. The semiconductor device also includes a second semiconductor element located in the second semiconductor layer. The semiconductor device also includes a wire extending within the second semiconductor layer and electrically connecting the first and second semiconductor elements.
    Type: Application
    Filed: December 13, 2007
    Publication date: January 15, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hidetoshi Koyama, Yoshitaka Kamo
  • Publication number: 20080246060
    Abstract: A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer being formed on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film formed on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. The portion of the gate electrode layer in contact with the nitride semiconductor layer has a higher nitrogen mole fraction than the other portion of the gate electrode layer.
    Type: Application
    Filed: September 24, 2007
    Publication date: October 9, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hidetoshi Koyama, Yoshitaka Kamo, Toshihiko Shiga