Patents by Inventor Hidetoshi Nakagawa

Hidetoshi Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134238
    Abstract: A display panel includes a display region and a peripheral region other than the display region. The display panel includes, in the peripheral region, a gate drive circuit and a first trunk line extending in a column direction. The first trunk line includes a first edge on a first side corresponding to the display region side in the row direction and a second edge on a second side corresponding to a side opposite to the display region in the row direction. The first trunk line includes a first portion and a second portion, each including the first edge and the second edge, and the first edge of the second portion is closer to the second side in the row direction than the first edge of the first portion. The first portion is not provided with an element, and the second portion includes a region provided with an element.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 25, 2024
    Inventors: Hidetoshi NAKAGAWA, Yoshihisa TAKAHASHI, Masahiro MATSUDA
  • Publication number: 20240136369
    Abstract: A display panel includes a display region defined by a plurality of pixels P and a peripheral region other than the display region. The display panel includes a gate drive circuit and a dummy capacitance portion in the peripheral region. The gate drive circuit includes a shift register. The dummy capacitance portion includes a plurality of capacitance elements connected in parallel and connected to a dummy stage. Each of the plurality of capacitance elements includes a first capacitance electrode, a second capacitance electrode, and a dielectric layer positioned between the first capacitance electrode and the second capacitance electrode. The dummy capacitance portion further includes at least one first connection portion with two ends respectively connected to the first capacitance electrode of any one of the plurality of capacitance elements and to the first capacitance electrode of any other one of the plurality of capacitance elements.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 25, 2024
    Inventors: Hidetoshi NAKAGAWA, Yoshihisa TAKAHASHI, Masahiro MATSUDA
  • Patent number: 11740524
    Abstract: A liquid crystal display device includes an active matrix substrate, a counter substrate, a liquid crystal layer, and a sealing portion. The active matrix substrate includes a substrate, a gate wiring line drive circuit monolithically formed on the substrate, a capacitance element supported by the substrate and provided at least partially overlapping the sealing portion when viewed from a direction normal to a display surface, the capacitance element including a first capacitance electrode, a second capacitance electrode disposed opposite the first capacitance electrode and between the first capacitance electrode and the sealing portion, and a dielectric layer located between the first capacitance electrode and the second capacitance electrode, and a transparent electrode formed of a transparent conductive material, disposed between the capacitance element and the sealing portion, and electrically connected to the second capacitance electrode.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: August 29, 2023
    Assignee: Sharp Display Technology Corporation
    Inventors: Tatsuya Nakamoto, Takashi Nakao, Nobuyoshi Nagashima, Hidetoshi Nakagawa
  • Publication number: 20230152644
    Abstract: A liquid crystal display device includes an active matrix substrate, a counter substrate, a liquid crystal layer, and a sealing portion. The active matrix substrate includes a substrate, a gate wiring line drive circuit monolithically formed on the substrate, a capacitance element supported by the substrate and provided at least partially overlapping the sealing portion when viewed from a direction normal to a display surface, the capacitance element including a first capacitance electrode, a second capacitance electrode disposed opposite the first capacitance electrode and between the first capacitance electrode and the sealing portion, and a dielectric layer located between the first capacitance electrode and the second capacitance electrode, and a transparent electrode formed of a transparent conductive material, disposed between the capacitance element and the sealing portion, and electrically connected to the second capacitance electrode.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 18, 2023
    Inventors: Tatsuya NAKAMOTO, Takashi NAKAO, Nobuyoshi NAGASHIMA, Hidetoshi NAKAGAWA
  • Patent number: 11605359
    Abstract: A display apparatus includes: a display panel including a display region, a first peripheral region, and a second peripheral region; and a circuit substrate. The display panel includes a gate drive circuit, n number of clock main lines, an outer main line and an inner main line, and a plurality of branch wiring lines. The first peripheral region includes a plurality of unit regions. The plurality of unit regions includes a first unit region and a second unit region. A resistance value of the at least one branch wiring line between the inner main line and the outer main line in the first unit region is smaller than a resistance value of the at least one branch wiring line between the inner main line and the outer main line in the second unit region.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: March 14, 2023
    Assignee: Sharp Display Technology Corporation
    Inventor: Hidetoshi Nakagawa
  • Publication number: 20230036306
    Abstract: A display apparatus includes: a display panel including a display region, a first peripheral region, and a second peripheral region; and a circuit substrate. The display panel includes a gate drive circuit, n number of clock main lines, an outer main line and an inner main line, and a plurality of branch wiring lines. The first peripheral region includes a plurality of unit regions. The plurality of unit regions includes a first unit region and a second unit region. A resistance value of the at least one branch wiring line between the inner main line and the outer main line in the first unit region is smaller than a resistance value of the at least one branch wiring line between the inner main line and the outer main line in the second unit region.
    Type: Application
    Filed: June 24, 2022
    Publication date: February 2, 2023
    Inventor: Hidetoshi NAKAGAWA
  • Patent number: 11289552
    Abstract: A display panel includes a substrate, a gate metal layer formed on a substrate, an insulating layer that covers the gate metal layer, and a source metal layer formed on the insulating layer. In a driving circuit region, the gate metal layer includes a first electrode and a second electrode separated from each other in a first direction and close to each other. The first electrode is positioned nearer than the second electrode to an active region and has a first side on a side facing the second electrode. The second electrode includes an ESD sacrificial portion. The ESD sacrificial portion includes a first part extending in the first direction and a second part facing the first side and extending in a second direction intersecting the first direction, the second part not overlapping a source metal of the source metal layer.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: March 29, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hidetoshi Nakagawa, Yoshihisa Takahashi, Masahiro Matsuda
  • Publication number: 20210272949
    Abstract: A display panel includes a substrate, a gate metal layer formed on a substrate, an insulating layer that covers the gate metal layer, and a source metal layer formed on the insulating layer. In a driving circuit region, the gate metal layer includes a first electrode and a second electrode separated from each other in a first direction and close to each other. The first electrode is positioned nearer than the second electrode to an active region and has a first side on a side facing the second electrode. The second electrode includes an ESD sacrificial portion. The ESD sacrificial portion includes a first part extending in the first direction and a second part facing the first side and extending in a second direction intersecting the first direction, the second part not overlapping a source metal of the source metal layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 2, 2021
    Inventors: HIDETOSHI NAKAGAWA, YOSHIHISA TAKAHASHI, MASAHIRO MATSUDA
  • Publication number: 20210265391
    Abstract: A display panel comprises: a plurality of pixels formed on a surface of a substrate; one or more drive circuits formed on the surface to supply signals to the pixels lining up; and a plurality of conductor patterns formed on the surface, electrically separated from each other, and each partially configuring the drive circuit. The conductor patterns comprise: a first conductor pattern having a first element forming portion configuring a part of a first circuit element of the drive circuit; and a second conductor pattern having a second element forming portion configuring a part of a second circuit element of the drive circuit. A discharge portion to narrow an interval between the first and second conductor patterns so as to be partially narrower than an interval between the first and second element forming portions is provided to the first conductor pattern and/or the second conductor pattern.
    Type: Application
    Filed: June 20, 2018
    Publication date: August 26, 2021
    Inventor: HIDETOSHI NAKAGAWA
  • Patent number: 11054709
    Abstract: A display panel (300) equipped with a display region (301) in which a plurality of switching elements (303) are positioned, a plurality of supply circuits (10) which supply a scanning signal the switching elements (303) and are arranged in a first direction in the periphery of the display region (301), a plurality of first signal lines (11, 12, 13, 14) which supply a prescribed signal to the supply circuits (10), extend in the first direction, and are arranged in a second direction which intersects the first direction, and a plurality of second signal lines (40, 41) which supply the prescribed signal to the supply circuits (10) and connect the first signal lines (11, 12, 13, 14) and the supply circuits (10) to one another, the display panel (300) being characterized in that some of the second signal lines (40, 41) have a meandering section (4a) that meanders in the portion thereof that overlaps the connected first signal lines (12, 13, 14).
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: July 6, 2021
    Assignee: SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Hidetoshi Nakagawa
  • Patent number: 11024503
    Abstract: To provide a laser annealing device capable of performing annealing whereby electron mobility is different depending on the part, a mask, a thin film transistor, and a laser annealing method. A laser annealing device of the present invention is provided with a mask in which a plurality of openings are formed along the scanning direction, moves a substrate in the scanning direction, and irradiates the substrate with laser light via the openings. The openings respectively have first opening regions, which are aligned in the scanning direction, and which have a same shape, and some of the openings among the openings respectively have second opening regions continuous to the first opening regions in the predetermined direction with respect to the first opening regions.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: June 1, 2021
    Assignee: SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Hidetoshi Nakagawa
  • Patent number: 11016353
    Abstract: A display apparatus includes thin-film transistors respectively provided for pixels arranged in a matrix form, one or more driving circuits provided at a side of one end of the display panel, a plurality of signal lines to each connect more than one of the plurality of thin-film transistors arranged in one line in the matrix form to the driving circuit, a plurality of spare lines formed to be connectable to any of the plurality of signal lines in an outer area of a display panel, and arranged separated from one another in an opposing region in the outer area, the opposing region being opposed to the driving circuits across the display area, and a metal pattern overlapping a first spare line and a second spare line with an insulating layer therebetween, so as to be connectable to the first spare line arranged in a first region and the second spare line arranged in a second region.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: May 25, 2021
    Assignee: Sakai Display Products Corporation
    Inventor: Hidetoshi Nakagawa
  • Patent number: 10811286
    Abstract: Provided is a laser annealing device provided with an irradiation unit in which a plurality of lens arrays each comprising one or more lenses are arranged at a first interval, wherein, while scanning a substrate having: a plurality of first area arrays each of which comprises one or more areas to be irradiated and which are arranged at the first interval; and a plurality of second area arrays which are arranged apart from the first area arrays toward one side in a direction orthogonal to the first area arrays by a second interval smaller than the first interval, the irradiation unit irradiates the areas to be irradiated with a laser beam through the one or more lenses. At least one type of area array, in one pixel unit row that comprises a plurality of area arrays including the first and second area arrays, is irradiated with a laser by use of a lens array different from the ones used for the other types of area arrays.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: October 20, 2020
    Assignee: SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Hidetoshi Nakagawa
  • Publication number: 20200303193
    Abstract: To provide a laser annealing device capable of performing annealing whereby electron mobility is different depending on the part, a mask, a thin film transistor, and a laser annealing method. A laser annealing device of the present invention is provided with a mask in which a plurality of openings are formed along the scanning direction, moves a substrate in the scanning direction, and irradiates the substrate with laser light via the openings. The openings respectively have first opening regions, which are aligned in the scanning direction, and which have a same shape, and some of the openings among the openings respectively have second opening regions continuous to the first opening regions in the predetermined direction with respect to the first opening regions.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 24, 2020
    Applicants: SAKAI DISPLAY PRODUCTS CORPORATION, SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Hidetoshi NAKAGAWA
  • Publication number: 20200050035
    Abstract: A display panel (300) equipped with a display region (301) in which a plurality of switching elements (303) are positioned, a plurality of supply circuits (10) which supply a scanning signal the switching elements (303) and are arranged in a first direction in the periphery of the display region (301), a plurality of first signal lines (11, 12, 13, 14) which supply a prescribed signal to the supply circuits (10), extend in the first direction, and are arranged in a second direction which intersects the first direction, and a plurality of second signal lines (40, 41) which supply the prescribed signal to the supply circuits (10) and connect the first signal lines (11, 12, 13, 14) and the supply circuits (10) to one another, the display panel (300) being characterized in that some of the second signal lines (40, 41) have a meandering section (4a) that meanders in the portion thereof that overlaps the connected first signal lines (12, 13, 14).
    Type: Application
    Filed: January 24, 2017
    Publication date: February 13, 2020
    Inventor: HIDETOSHI NAKAGAWA
  • Publication number: 20200027722
    Abstract: Provided are a laser annealing device, laser annealing method, and mask which make it possible to reduce display blurriness at a mask-joining boundary. The laser annealing device is equipped with a mask in which a plurality of opening blocks, which include a plurality of openings arranged in the column direction parallel to the scanning direction, are arranged in the row direction which is perpendicular to the scanning direction. The laser annealing device moves the mask and/or substrate in a direction parallel to the scanning direction, and each time the mask and/or substrate move to a prescribed position in the direction perpendicular to the scanning direction, performs processing for irradiating a plurality of prescribed substrate regions with a laser beam through the plurality of openings.
    Type: Application
    Filed: January 24, 2017
    Publication date: January 23, 2020
    Inventor: HIDETOSHI NAKAGAWA
  • Publication number: 20190348310
    Abstract: Provided is a laser annealing device provided with an irradiation unit in which a plurality of lens arrays each comprising one or more lenses are arranged at a first interval, wherein, while scanning a substrate having: a plurality of first area arrays each of which comprises one or more areas to be irradiated and which are arranged at the first interval; and a plurality of second area arrays which are arranged apart from the first area arrays toward one side in a direction orthogonal to the first area arrays by a second interval smaller than the first interval, the irradiation unit irradiates the areas to be irradiated with a laser beam through the one or more lenses. At least one type of area array, in one pixel unit row that comprises a plurality of area arrays including the first and second area arrays, is irradiated with a laser by use of a lens array different from the ones used for the other types of area arrays.
    Type: Application
    Filed: September 28, 2016
    Publication date: November 14, 2019
    Inventor: HIDETOSHI NAKAGAWA
  • Patent number: 10372001
    Abstract: A display device according to the present invention is provided with: a display panel that has a display area and a non-display area; a plurality of signal lines that are provided on the display panel; a spare wire (40) that extends to the non-display area and the outside of the display panel and that should be connected to the signal lines; a plurality of connection terminals that are provided on the display panel; and amplifiers (7) that are connected, at input sides thereof, to first connection terminals (21), that should be connected, at output sides thereof, to the spare wire (40), and that are located outside the display panel.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: August 6, 2019
    Assignee: Sakai Display Products Corporation
    Inventor: Hidetoshi Nakagawa
  • Patent number: 10303024
    Abstract: An example display apparatus includes: a display panel having a display region and a non-display region located at peripheries of the display region; a signal line provided in the display panel to transmit an image signal; a spare wiring routed to an outside of the display panel and the non-display region of the display panel, and connected to the signal line; a plurality of connection terminals; and an amplifier which have an input side connected to a first connection terminal and an output side connected to the spare wiring, and the display apparatus is configured to input a signal from the signal line to the amplifier through the first connection terminal. On the output side of the amplifier, a part of the spare wiring is connected to a second connection terminal, and is routed to the non-display region from the outside of the display panel. The part of the spare wiring is further connected a third connection terminal, and is routed to the outside of the display panel.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: May 28, 2019
    Assignee: Sakai Display Products Corporation
    Inventor: Hidetoshi Nakagawa
  • Patent number: 10234712
    Abstract: A method produces a liquid crystal display. The display includes a plurality of pixels having sub-pixels that include one opening and one color layer. Some of the sub-pixels having the same color are continuously spaced in one direction. In the method, overlapping photolithographic patterns produce mask openings in which a color layer in two spaced adjacent sub-pixels is to be formed. The mask openings each have a size corresponding to two or more adjacent sub-pixels; and the number of sub-pixels of the same color that are continuously arranged in the one direction is at least twice the total number of sub-pixels of the same color included in each of the pixels.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: March 19, 2019
    Assignee: Sakai Display Products Corporation
    Inventors: Hidetoshi Nakagawa, Akihiro Yamamoto, Yoshitaka Okumoto, Tokuyoshi Awa, Taiki Hayai