Patents by Inventor Hidetoshi Narahara

Hidetoshi Narahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of analyzing electromagnetic interference
    Patent number: 7039572
    Abstract: In a gate-level logic simulation, a change in electric current is calculated from event information 5 output from a logic simulator 4 through use of a current waveform calculation section 7. The thus-calculated change in current is subjected to FFT processing through use of an FFT processing section 9, thereby determining a frequency characteristic of EMI and enabling EMI analysis.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: May 2, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hidetoshi Narahara, Seijirou Kojima, Hiroyuki Tsujikawa, Kenji Shimazaki, Kasumi Hamaguchi
  • Simulation method and emulation method
    Publication number: 20040111249
    Abstract: A simulation method of the present invention comprises the steps of recording an executed-row history for each description block of a hardware description; and if the same description block is performed at the same time, deleting a previous executed-row history of the description block performed at the time. With such a feature, an error count in coverage measurement is prevented.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 10, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Hidetoshi Narahara