Patents by Inventor Hideyuki Hagino

Hideyuki Hagino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8569962
    Abstract: A withstand voltage of the LED driver circuit is set to be lower than an LED power supply voltage of the power supply and be higher than a first voltage value obtained by subtracting a voltage drop across whole of the LEDs connected in series caused by the second constant current from the LED power supply voltage. When raising a luminous intensity of the LEDs, in response to the control signal, the control circuit controls the switch circuit to bring about conduction between the LED drive terminal and the first switch terminal to let the first constant current flow through the LEDs. When lowering the luminous intensity of the LEDs, in response to the control signal, the control circuit controls the switch circuit to bring about conduction between the LED drive terminal and the second switch terminal to let the second constant current flow through the LEDs.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: October 29, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Masahiro Shimozono, Shinichi Kiyota
  • Publication number: 20120236211
    Abstract: According to one embodiment, a display has an indicator, an information extractor, and an indicator controller. The indicator is configured to irradiate first visible light indicative of an operation status of the display The information extractor is configured to extract at least a video signal and additional information from an input signal. The indicator controller is configured to modulate the first visible light with a frequency higher than a frame rate of the video signal according to the additional information.
    Type: Application
    Filed: September 15, 2011
    Publication date: September 20, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Publication number: 20120139430
    Abstract: A withstand voltage of the LED driver circuit is set to be lower than an LED power supply voltage of the power supply and be higher than a first voltage value obtained by subtracting a voltage drop across whole of the LEDs connected in series caused by the second constant current from the LED power supply voltage. When raising a luminous intensity of the LEDs, in response to the control signal, the control circuit controls the switch circuit to bring about conduction between the LED drive terminal and the first switch terminal to let the first constant current flow through the LEDs. When lowering the luminous intensity of the LEDs, in response to the control signal, the control circuit controls the switch circuit to bring about conduction between the LED drive terminal and the second switch terminal to let the second constant current flow through the LEDs.
    Type: Application
    Filed: September 15, 2011
    Publication date: June 7, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Masahiro Shimozono, Shinichi Kiyota
  • Patent number: 6201430
    Abstract: The computational circuit adds a drain current of a first MIS transistor which is driven by inputting a signal obtained by superimposing an AC signal to a DC voltage, and a drain current of a second MIS transistor which is driven by inputting a signal obtained by superimposing the same AC signal as above but reversal in phase to the DC voltage, and subtracts a drain current of a third MIS transistor driven by supplying the DC voltage to the gate thereof so as to erase DC components of the outputs of the first and second MIS transistors. Thereby, it is possible to produce a current in proportional to square of the AC signal.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: March 13, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Susumu Hoshino
  • Patent number: 6148137
    Abstract: A noise-bar period detection circuit detects a noise bar period in response to a low-frequency carrier wave FM signal contained in a signal reproduced by a video head when a video tape is reproduced in a special mode so as to output a noise-bar detection signal. A reproduced-signal processing circuit including a clamp circuit, an AGC circuit and the like maintains normal voltage immediately before the noise bar period in response to the noise-bar detection signal output from the noise-bar period detection circuit. Therefore, restoration to a normal state can be performed immediately after the noise bar period.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: November 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Kusano, Hideyuki Hagino
  • Patent number: 6118919
    Abstract: A luminous signal processing system, adapted for use in a home VTR, controls the frequency characteristic of a color signal trapping circuit in accordance with the level of a color signal component. The system widens the band of a luminous signal component, thereby improving the resolution.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: September 12, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5767730
    Abstract: The collector of the first transistor having the base to which the first signal input is supplied, is connected to the collector of the second transistor having the base to which the second signal input is supplied. The diode-connected third transistor is connected between the emitter of the first transistor and the output node, and the diode-connected fourth transistor is connected between the emitter of the second transistor and the output node. The first current mirror circuit supplies the current flowing in the constant current source to the emitters of the first and third transistors when the fifth transistor is in the ON state. The second current mirror circuit supplies the current flowing in the constant current source to the emitters of the second and fourth transistors when the sixth transistor is in the ON state.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: June 16, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5699019
    Abstract: There is provided an active filter, having a first high-pass filter for receiving an input signal, performing filter processing of the input signal, and outputting a first signal, a second high-pass filter, an input terminal of which is connected to an output terminal of said first high-pass filter, and which receives the first signal, performs filter processing, and outputs a second signal, a differential amplifier, one input terminal of which is connected to an output terminal of said second high-pass filter to receive the second signal, the other input terminal of which is connected to the output terminal of said first high-pass filter to receive the first signal, and which outputs a third signal obtained by multiplying a difference between the first and second signals with a gain, and an adder for receiving and adding the third signal output from said differential amplifier and the input signal, and outputting a sum signal.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: December 16, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5574398
    Abstract: An active bandpass filter offers freely settable values of quality factor Q and peak gain. The active bandpass filter has a first transistor, the base of which is connected to an input terminal of the filter via a first capacitance element, the collector of which is connected to a first constant voltage source, and the emitter of which is connected to a first constant current source or a resistance element. The active bandpass filter also has a second transistor, the base of which is connected both to a second constant voltage source via a first resistance element and to the emitter of the first transistor via a second capacitance element, the collector of which is connected both to an output terminal of the filter and, via a second resistance element, to the first constant voltage source, and the emitter of which is connected both to the base of the first transistor via a third resistance element, and also to a second constant current source or a resistance element.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 12, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Michiro Yokote
  • Patent number: 5561394
    Abstract: An active bandpass filter offers freely settable values of quality factor Q and peak gain. The active bandpass filter has a first, a second and a third transistor. The first transistor has a base connected to an input terminal of the filter via a first resistance element, a collector connected both to a constant voltage source via a second resistance element and to an output terminal of the filter and an emitter connected to a first constant current source. The second transistor has a base connected to the emitter of the first transistor via a third resistance element, a collector connected to the constant voltage source via a fourth resistance element and an emitter connected both to the base of the first transistor via a first capacitance element and to a second constant current source.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 1, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5523798
    Abstract: For realizing more accurately a signal separation of a luminance signal and a chrominance signal, a signal separation automatic adjusting circuit in a YC separation comb filter includes an amplitude adjusting loop for detecting a level of a color signal component remaining in the separated luminance signal to adjust amplitudes in an image signal and a 1H delayed image signal, a first phase adjusting loop for adjusting phases of the image signal and the 1H delayed image signal which are respectively inputted into an adder, and a second phase adjusting loop for adjusting phases of the image signal and the 1H delayed image signal in the manner of suppressing the color signal remaining in the luminance signal. According to the constitution, it is possible to prevent an intermix of the color signal component into the luminance, thereby obtaining the YC separation automatic adjusting circuit having a high accuracy.
    Type: Grant
    Filed: March 23, 1994
    Date of Patent: June 4, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Mitsumo Kawano
  • Patent number: 5448305
    Abstract: An input of a charge coupled device (CCD) delay element is an additional signal of a reproduced luminance signal and a reproduced chrominance signal, while an output of the CCD delay element is separated by an LPF and a BPF into a delayed luminance signal and a delayed chrominance signal, thereby constituting a comb filter by using the input signal before an addition and delayed/reproduced signals. Accordingly, it is unnecessary to provide a filter for limiting a band width, which is inserted into a main signal path. Furthermore, since it is possible to constitute a comb filter which does not narrow a signal band width of the reproduced luminance signal and the reproduced chrominance signal, there can be provided a comb filter for removing a cross-talk and noises and which does not narrow a signal band width of the luminance signal and the chrominance signal.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: September 5, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5150220
    Abstract: A video reproduction signal-processing circuit is an integrated circuit and is incorporated in a video tape recorder. In this integrated circuit, a dropout-detecting circuit generates a dropout signal, and a limiter circuit and a wave-shaping circuit jointly output a noncorrelation/correlation signal. The dropout signal and the noncorrelation/correlation signal are first added together by an adder circuit, and are then output from the integrated circuit through a single output terminal.
    Type: Grant
    Filed: September 14, 1990
    Date of Patent: September 22, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5124592
    Abstract: An input signal is supplied to the non-inverting input terminal of a current differential amplifier. A capacitor is connected between the output terminal of the current differential amplifier and a power source and the capacitor stores charges according to an output signal of the current differential amplifier. The input signal and an output signal of the current differential amplifier are supplied to resistors via buffer circuits and signals divided by the resistors are added together by a buffer circuit and output from an output terminal and at the same time fed back to the inverting input terminal of the current differential amplifier.
    Type: Grant
    Filed: February 13, 1991
    Date of Patent: June 23, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5122867
    Abstract: This invention discloses a video signal processing circuit of a comb filter arrangement for separating and extracting a luminance signal and a chrominance signal from an input video signal including the luminance signal and the chrominance signal. The input video signal is delayed by a delay circuit by a 1H period, and a 1H-delayed signal is supplied to a band-pass filter. The signal having passed through the band-pass filter is added to the original input video signal by an adding circuit. An output from the adding circuit is supplied to a trap circuit and chrominance signal components are eliminated. Meanwhile, the signal having passed through the band-pass filter is eliminated from the input video signal by a subtracting circuit, and an amplitude of an output from the subtracting circuit is attenuated by an attenuating circuit.
    Type: Grant
    Filed: September 21, 1990
    Date of Patent: June 16, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5119179
    Abstract: A video signal processing circuit for reproducing an FM video signal. A video reproduction signal output from a magnetic head is supplied to a low-pass filter, which extracts a chroma signal. The video reproduction signal is also supplied to a chroma signal removing circuit through a high-pass filter of low degree and sharpness. The chroma signal removing circuit removes the chroma signal component. The output of the chroma signal removing circuit is amplitude-limited to a predetermined degree by a limiter, and then supplied to a demodulator which extracts a luminance signal.
    Type: Grant
    Filed: September 14, 1990
    Date of Patent: June 2, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideyuki Hagino
  • Patent number: 5079633
    Abstract: A video signal processor comprises a first filtering circuit, a first and a second emphasis circuits, a noise removing circuit, and a converter. The first filtering circuit filters an input video signal, and extracts a low frequency component. The first emphasis circuit emphasizes the low frequency component, and outputs a first emphasized signal. The second emphasis circuit emphasizes the first emphasized signal, and outputs a second emphasized signal. The noise removing circuit removes a noise component from either the first emphasized signal or the second emphasized signal, and outputs the noise-removed signal. The converter converts the noise-removed signal into a frequency-modulated signal.
    Type: Grant
    Filed: May 2, 1990
    Date of Patent: January 7, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Tatsuya Matsuki
  • Patent number: 5038203
    Abstract: A first circuit generates a first voltage which increases at a predetermined time constant in synchronism with the leading edge of a pulse contained in a sync signal. A second circuit compares the first voltage with a fixed second voltage. When the trailing edge of the pulse contained in the sync signal arrives at the first circuit before the increasing first voltage reaches the fixed second voltage, the first circuit stops generating the first voltage. A third circuit compares the first voltage with a fixed third voltage and a fixed fourth voltage which are higher than the fixed second voltage, and generates a train of burst gate pulses which become high in level after the first voltage exceeds the fixed third voltage, and low in level after the first voltage exceeds the fixed fourth voltage.
    Type: Grant
    Filed: June 26, 1989
    Date of Patent: August 6, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Teruo Okada
  • Patent number: 4851718
    Abstract: A first operational amplifier differentially operates a signal to be adjusted input by an input unit and an adjusted signal output by an output unit. A second operational amplifier differentially operates a first output from the first operational amplifier and the adjusted signal. A buffer supplies a second output from the second operational amplifier to the output unit as the adjusted signal. A first adder obtains a sum component of a first signal obtained by multiplying a first variable m with the signal to be adjusted and a second signal obtained by multiplying a second variable 1-n with the adjusted signal. A first capacitor superposes the sum component of the first and second signals on the first output to supply a superposed signal to the second operational amplifier. A second adder obtains the signal to be adjusted or a component obtained by multiplying the first variable m with the signal to be adjusted as a third signal.
    Type: Grant
    Filed: September 2, 1988
    Date of Patent: July 25, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Takahiro Kusano
  • Patent number: 4841179
    Abstract: A first operational amplifier (OP AMP) is connected at the positive input terminal to a signal input terminal. The positive output terminal of the first OP AMP is connected to a ground through a first capacitor, and to the positive input terminal of a second OP AMP. The positive output terminal of the second OP AMP is connected to positive input terminal of the first OP AMP via a second capacitor, and to the input terminal of a buffer. The output terminal of the buffer is connected to the negative input terminal of the first OP AMP, and to the positive input terminal of the first OP AMP via the connected series of the first and second resistors. The connection point of these resistors is connected to the negative input terminal of the second OP AMP. The output terminal of the buffer is connected to a signal output terminal. When the resistances of these resistors are equal, the circuit has a phase equalizer characteristic.
    Type: Grant
    Filed: December 23, 1987
    Date of Patent: June 20, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Hagino, Takahiro Kusano