Abstract: A nitride semiconductor epitaxial substrate includes: a Si substrate; a nitride semiconductor epitaxial layer disposed above the Si substrate; and a mixed crystal layer disposed between the Si substrate and the nitride semiconductor epitaxial layer, and containing Si and a group III metal element, the mixed crystal layer containing a high concentration of C. The mixed crystal layer has a concentration of at least 1.0×10+21 cm?3, and a transition metal element concentration of at most 5.0×10+16 cm?3.

Abstract: A nitride semiconductor device includes: a substrate; and a first nitride semiconductor layer, a second nitride semiconductor layer, and a third nitride semiconductor layer that are disposed above the substrate in the stated order. The first nitride semiconductor layer includes a recess. The second nitride semiconductor layer has a band gap larger than a band gap of the first nitride semiconductor layer and is disposed in a region other than the recess. The third nitride semiconductor layer has a band gap larger than the band gap of the first nitride semiconductor layer and covers the first nitride semiconductor layer and the second nitride semiconductor layer including an inner wall of the recess. A contact angle at which a side wall of the recess and an interface between the first nitride semiconductor layer and the second nitride semiconductor layer meet ranges from 140° to less than 180°.

Abstract: A semiconductor device includes: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; finger-shaped source electrodes on the second nitride semiconductor layer; finger-shaped drain electrodes disposed so as to be spaced apart from the source electrodes; and finger-shaped gate electrodes respectively disposed between the source electrodes and the drain electrodes. The gate electrodes are electrically connected, via a first gate integrated wiring, a plurality of second gate integrated wirings and a third gate integrated wiring, to gate pads located on one or both ends of the third gate integrated wiring. A plurality of source pads and the plurality of second gate integrated wirings are formed alternately in a first direction perpendicular to the longitudinal direction of the gate electrodes.

Abstract: A nitride semiconductor device includes: a first active area surrounded by an isolation area; and the following electrodes above the first active area: a source electrode; a first gate electrode and a second gate electrode, one on either side of and spaced from the source electrode in a first direction in plan view; and at least one drain electrode located in a direction opposite the source electrode relative to the first gate electrode or the second gate electrode. The source electrode, the first gate electrode, the second gate electrode, and the at least one drain electrode each include a finger-shaped portion extending in a second direction perpendicular to the first direction in the plan view. A first dielectric film is disposed above the source electrode. The first gate electrode and the second gate electrode are electrically connected by a gate electrode joiner disposed above the first dielectric film.

Abstract: A nitride semiconductor device includes a semiconductor layered structure including a substrate, a channel layer, and a barrier layer. The channel layer is formed above the substrate and made of a nitride semiconductor layer. The barrier layer is formed on the channel layer, has a wider band gap than the channel layer, and is made of a nitride semiconductor layer. The semiconductor layered structure includes an isolation region in which impurities are implanted. The position of an impurity concentration peak in the depth direction in the isolation region is deeper than the interface between the barrier layer and the channel layer. The concentration of the impurities at the interface between the barrier layer and the channel layer in the isolation region is lower than the concentration at the impurity concentration peak.

Abstract: A semiconductor device includes: a substrate; a channel layer constituted of a single nitride semiconductor on the substrate; a first barrier layer which is a nitride semiconductor on a part of an upper surface of the channel layer and having a band gap larger than that of the channel layer; a gate layer which is a nitride semiconductor on and in contact with the first barrier layer; a second barrier layer which is a nitride semiconductor in contact with the first barrier layer in an area where the gate layer is not disposed above the channel layer, and having a band gap larger than that of the channel layer and having a thickness or a band gap independent from the first barrier layer; a gate electrode on the gate layer; and a source electrode and a drain electrode spaced apart from the gate layer and on the second barrier layer.

Abstract: A semiconductor device includes a substrate; a first nitride semiconductor layer above the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; an ohmic electrode above the substrate; and a contact layer in contact with at least a part of the ohmic electrode, the contact layer containing silicon and chlorine. The second nitride semiconductor layer has a wider band gap than the first nitride semiconductor layer. A two-dimensional electron gas channel is formed in the first nitride semiconductor layer at a heterointerface between the first nitride semiconductor layer and the second nitride semiconductor layer. A silicon concentration has a higher peak value than a chlorine concentration in the contact layer.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer disposed above the substrate; a second nitride semiconductor layer disposed above the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; a third nitride semiconductor layer selectively disposed above the second nitride semiconductor layer and containing a p-type first impurity element; a high resistance region disposed in the third nitride semiconductor layer, the high resistance region containing a second impurity element and having a specific resistance higher than a specific resistance of the third nitride semiconductor layer; and a gate electrode disposed above the high resistance region, wherein an end of the high resistance region is inside a surface end of the third nitride semiconductor layer.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer having a greater band gap than the first nitride semiconductor layer; a source electrode and a drain electrode on the second nitride semiconductor layer apart from each other; a third nitride semiconductor layer, between the source electrode and the drain electrode, containing a p-type first impurity and serving as a gate; and a fourth nitride semiconductor layer, between the third nitride semiconductor layer and the drain electrode, containing a p-type second impurity, wherein the average carrier concentration of the fourth nitride semiconductor layer is lower than the average carrier concentration of the third nitride semiconductor layer.

Abstract: A semiconductor device includes a substrate; a first nitride semiconductor layer above the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; an ohmic electrode above the substrate; and a contact layer in contact with at least a part of the ohmic electrode, the contact layer containing silicon and chlorine. The second nitride semiconductor layer has a wider band gap than the first nitride semiconductor layer. A two-dimensional electron gas channel is formed in the first nitride semiconductor layer at a heterointerface between the first nitride semiconductor layer and the second nitride semiconductor layer. A silicon concentration has a higher peak value than a chlorine concentration in the contact layer.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer disposed above the substrate; a second nitride semiconductor layer disposed above the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; a third nitride semiconductor layer selectively disposed above the second nitride semiconductor layer and containing a p-type first impurity element; a high resistance region disposed in the third nitride semiconductor layer, the high resistance region containing a second impurity element and having a specific resistance higher than a specific resistance of the third nitride semiconductor layer; and a gate electrode disposed above the high resistance region, wherein an end of the high resistance region is inside a surface end of the third nitride semiconductor layer.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer having a greater band gap than the first nitride semiconductor layer; a source electrode and a drain electrode on the second nitride semiconductor layer apart from each other; a third nitride semiconductor layer, between the source electrode and the drain electrode, containing a p-type first impurity and serving as a gate; and a fourth nitride semiconductor layer, between the third nitride semiconductor layer and the drain electrode, containing a p-type second impurity, wherein the average carrier concentration of the fourth nitride semiconductor layer is lower than the average carrier concentration of the third nitride semiconductor layer.

Abstract: A semiconductor device includes: a substrate; a channel layer constituted of a single nitride semiconductor on the substrate; a first barrier layer which is a nitride semiconductor on a part of an upper surface of the channel layer and having a band gap larger than that of the channel layer; a gate layer which is a nitride semiconductor on and in contact with the first barrier layer; a second barrier layer which is a nitride semiconductor in contact with the first barrier layer in an area where the gate layer is not disposed above the channel layer, and having a band gap larger than that of the channel layer and having a thickness or a band gap independent from the first barrier layer; a gate electrode on the gate layer; and a source electrode and a drain electrode spaced apart from the gate layer and on the second barrier layer.

Abstract: A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer (1) located over the substrate; a second nitride semiconductor layer (2) located over the first nitride semiconductor layer (1), having a larger band gap than the first nitride semiconductor layer (1), and having a recess (11) penetrating into the first nitride semiconductor layer (1); and a third nitride semiconductor layer (12) continuously covering the second nitride semiconductor layer (2) and the recess (11), and having a larger band gap than the first nitride semiconductor layer (1); a gate electrode (5) located above a portion of the third nitride semiconductor layer (12) over the recess (11); and a first ohmic electrode (4a) and a second ohmic electrode (4b) located on opposite sides of the gate electrode (5).

Abstract: A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.

Abstract: A semiconductor device includes a substrate, a semiconductor layer stacked body, and a source electrode and a drain electrode formed on the semiconductor layer stacked body. The semiconductor layer stacked body includes a first nitride semiconductor layer formed on the substrate, and a second nitride semiconductor layer formed on the first nitride semiconductor layer. The semiconductor device further includes a third nitride semiconductor layer formed on the second nitride semiconductor layer and disposed between the source electrode and the drain electrode, and a gate electrode formed on the third nitride semiconductor layer. The semiconductor device includes a first magnesium-containing region having a magnesium concentration of 1×1018 cm?3 or more that is provided right under the third nitride semiconductor layer, from an upper surface of the second nitride semiconductor layer to a position lower than an interface between the first nitride semiconductor layer and the second nitride semiconductor layer.

Abstract: A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the first nitride semiconductor layer, a recess having a bottom portion which reaches the first nitride semiconductor layer through a part of the p-type nitride semiconductor layer, a third nitride semiconductor layer formed to cover the bottom portion of the recess, a side portion of the recess, and a part of an upper surface of the p-type nitride semiconductor layer. The semiconductor device further includes a fourth nitride semiconductor layer formed on the third nitride semiconductor layer, a first electrode formed on another side of the substrate, a gate electrode formed on the upper surface of the p-type nitride semiconductor layer, and a second electrode that is in contact with the third nitride semiconductor layer or the fourth nitride semiconductor layer.

Abstract: A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the first nitride semiconductor layer, a recess having a bottom portion which reaches the first nitride semiconductor layer through a part of the p-type nitride semiconductor layer, a third nitride semiconductor layer formed to cover the bottom portion of the recess, a side portion of the recess, and a part of an upper surface of the p-type nitride semiconductor layer. The semiconductor device further includes a fourth nitride semiconductor layer formed on the third nitride semiconductor layer, a first electrode formed on another side of the substrate, a gate electrode formed on the upper surface of the p-type nitride semiconductor layer, and a second electrode that is in contact with the third nitride semiconductor layer or the fourth nitride semiconductor layer.

Abstract: A semiconductor device includes a substrate, a semiconductor layer stacked body, and a source electrode and a drain electrode formed on the semiconductor layer stacked body. The semiconductor layer stacked body includes a first nitride semiconductor layer formed on the substrate, and a second nitride semiconductor layer formed on the first nitride semiconductor layer. The semiconductor device further includes a third nitride semiconductor layer formed on the second nitride semiconductor layer and disposed between the source electrode and the drain electrode, and a gate electrode formed on the third nitride semiconductor layer. The semiconductor device includes a first magnesium-containing region having a magnesium concentration of 1×1018 cm?3 or more that is provided right under the third nitride semiconductor layer, from an upper surface of the second nitride semiconductor layer to a position lower than an interface between the first nitride semiconductor layer and the second nitride semiconductor layer.