Patents by Inventor Hikaru Kobayashi

Hikaru Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6433269
    Abstract: A cyano process of introducing cyano ions (CN−) into an amorphous silicon layer is performed after the amorphous silicon layer has been formed over a substrate or after the layer has been exposed to light. For example, the substrate is immersed in an aqueous solution containing potassium cyanide (KCN) in a vessel. The cyano process eliminates factors (e.g., weak bonds, defects, and centers of recombination) of decrease in photoconductivity of the as-deposited amorphous silicon thin film, which are identifiable in the as-deposited film. As a result, the photoconductivity of the amorphous silicon layer is already higher than usual from the beginning and will hardly decrease even upon exposure to light.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: August 13, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hikaru Kobayashi, Hideomi Koinuma
  • Patent number: 6265327
    Abstract: Disclosed are a method and apparatus for forming an insulating film on the surface of a semiconductor substrate capable of improving the quality and electrical properties of the insulating film with no employment of high-temperature heating and with good controllability. After the surface of a silicon substrate is cleaned, a silicon dioxide film having a thickness of 1-20 nm is formed on the substrate surface. The silicon substrate is exposed to plasma generated by electron impact, while the silicon substrate is maintained at a temperature of 0° C. to 700° C. Thus, nitrogen atoms are incorporated into the silicon dioxide film, obtaining a modified insulating film having good electrical properties.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: July 24, 2001
    Assignees: Japan Science and Technology Corp., Matsushita Electronics Corp.
    Inventors: Hikaru Kobayashi, Kenji Yoneda
  • Patent number: 6221788
    Abstract: The semiconductor of the present invention comprises at least an oxide film and a metal thin film on the surface of the semiconductor. The metal thin film includes a metal serving as an oxidation catalyst and has a thickness in the range of 0.5-30 nm. The oxide film comprises a metal serving as an oxidation catalyst and having a thickness in the range of 1-20 nm. Thus, a high-quality oxide film can be formed on the surface of the semiconductor substrate with high controllability without conducting a high temperature heat treatment. The invention employs the method of manufacturing the semiconductor has a steps of forming the first oxidation film having thickness in the range of 0.1-2.5 nm on the semiconductor substrate; forming the metal thin film (for example platinum film) serving as an oxide catalyst to the thickness in the range of 0.5-30 nm on the first oxide thin film; and then forming the second oxide film by heat treating in an oxidizing atmosphere at temperatures from 25 to 600° C.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: April 24, 2001
    Assignees: Matsushita Electronics Corporation, Hikaru Kobayashi
    Inventors: Hikaru Kobayashi, Kenji Yoneda, Takashi Namura
  • Patent number: 6022813
    Abstract: There are disclosed a method and apparatus for manufacturing semiconductor devices. The surface of each semiconductor substrate is exposed to cyanide ions (CN.sup.-) in order to reduce the density of interface states at the insulating film/semiconductor interface. For this purpose, the semiconductor substrate is immersed into a cyan compound solution or is exposed to a cyan compound gas, so that cyanide ions (CN.sup.-) are bonded to dangling bonds at the surface of the semiconductor substrates. As a result, the interface states at the insulating film/semiconductor interface can be reduced.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: February 8, 2000
    Assignees: Japan Science and Technology Corporation, Matsushita Electronics Corporation
    Inventors: Hikaru Kobayashi, Kenji Yoneda
  • Patent number: 5100519
    Abstract: In a method of trapping ions in a silicon oxide film or a silicon oxy-nitride film, silicon or silicon nitride as an electrode is first immersed in a nonaqueous solvent containing an electrolyte. Then, a voltage is applied between the electrode and a counter electrode so as to oxidize the surface of the silicon or silicon nitride to form a silicon oxide film or a silicon oxy-nitride film. At the same time, the ions contained in the electrolyte are caused to permeate into the silicon oxide film or the silicon oxy-nitride film and trapped therein. The method is thus capable of trapping ions in a silicon oxide film or a silicon oxy-nitride film for a short time without using any evaporation apparatus and of shifting the flat band potential of the silicon.
    Type: Grant
    Filed: December 5, 1990
    Date of Patent: March 31, 1992
    Assignee: Mitsubishi Kenki Kabushiki Kaisha
    Inventors: Hiroshi Tsubomura, Hikaru Kobayashi