Patents by Inventor Himanshu Thapliyal

Himanshu Thapliyal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11206146
    Abstract: An equivalent circuit architecture and attendant methods for generating a physically unclonable function (PUF) response include a plurality of devices capable of generating a voltage output, a voltage source, and a microcontroller adapted to receive the voltage output from each device of the plurality of devices. The devices may be energy harvesting devices or sensors. The microcontroller is configured to determine an average peak voltage for predefined groups of the plurality of devices, to compare summation voltage values for the predefined groups, and from that information to output response values defining a 128-bit PUF response. The microcontroller determines a peak voltage of each device of the plurality of devices an equal number of times to generate the 128 bit PUF response value, this preventing biasing the response towards any individual device or group of devices.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: December 21, 2021
    Assignee: University of Kentucky Research Foundation
    Inventors: Himanshu Thapliyal, Carson Labrado
  • Publication number: 20210036874
    Abstract: An equivalent circuit architecture and attendant methods for generating a physically unclonable function (PUF) response include a plurality of devices capable of generating a voltage output, a voltage source, and a microcontroller adapted to receive the voltage output from each device of the plurality of devices. The devices may be energy harvesting devices or sensors. The microcontroller is configured to determine an average peak voltage for predefined groups of the plurality of devices, to compare summation voltage values for the predefined groups, and from that information to output response values defining a 128-bit PUF response. The microcontroller determines a peak voltage of each device of the plurality of devices an equal number of times to generate the 128 bit PUF response value, this preventing biasing the response towards any individual device or group of devices.
    Type: Application
    Filed: August 3, 2020
    Publication date: February 4, 2021
    Inventors: Himanshu Thapliyal, Carson Labrado
  • Patent number: 10868534
    Abstract: An adiabatic logic-in-memory based complementary metal-oxide-semiconductor/magnetic-tunnel-junction (ALiM CMOS/MTJ) circuit utilizes an adiabatic logic based pre-charged sense amplifier (PCSA) to recover energy from its output load capacitors. The ALiM CMOS/MTJ includes a non-volatile magnetic-tunnel-junction (MTJ) based memory. The ALiM CMOS/MTJ also includes a dual rail complementary metal-oxide-semiconductor (CMOS) logic that performs logic operations in association with the MTJ, and thereby generates logic outputs based on logic inputs. The ALiM CMOS/MTJ also includes the adiabatic PCSA, which is operatively coupled to the dual rail CMOS logic. The adiabatic logic based PCSA includes PCSA circuitry for which an input is a multi-phase power clock, and a charge recovery circuit having the output load capacitors. The charge recovery circuit is operatively coupled to the PCSA circuitry such that the ALiM CMOS/MTJ circuit uses the power clock to recover energy from the output load capacitors.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: December 15, 2020
    Assignee: University of Kentucky Research Foundation
    Inventors: Himanshu Thapliyal, S. Dinesh Kumar
  • Publication number: 20200021290
    Abstract: An adiabatic logic-in-memory based complementary metal-oxide-semiconductor/magnetic-tunnel-junction (ALiM CMOS/MTJ) circuit utilizes an adiabatic logic based pre-charged sense amplifier (PCSA) to recover energy from its output load capacitors. The ALiM CMOS/MTJ includes a non-volatile magnetic-tunnel-junction (MTJ) based memory. The ALiM CMOS/MTJ also includes a dual rail complementary metal-oxide-semiconductor (CMOS) logic that performs logic operations in association with the MTJ, and thereby generates logic outputs based on logic inputs. The ALiM CMOS/MTJ also includes the adiabatic PCSA, which is operatively coupled to the dual rail CMOS logic. The adiabatic logic based PCSA includes PCSA circuitry for which an input is a multi-phase power clock, and a charge recovery circuit having the output load capacitors. The charge recovery circuit is operatively coupled to the PCSA circuitry such that the ALiM CMOS/MTJ circuit uses the power clock to recover energy from the output load capacitors.
    Type: Application
    Filed: July 12, 2018
    Publication date: January 16, 2020
    Inventors: Himanshu Thapliyal, S. Dinesh Kumar
  • Patent number: 7880496
    Abstract: A novel conservative gate especially suiting a Quantum Dot Cellular Automata (QCA) majority voter-based design. The input-to-output mapping of the novel conservative QCA (CQCA) gate is: P=A; Q=AB+BC+AC [MV(A,B,C)]; R=A?B+A?C+BC [MV(A?,B,C)], where A, B, C are inputs and P, Q, R are outputs, respectively. A method of transferring information in a quantum-dot cellular automata device is also provided.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: February 1, 2011
    Assignee: University of South Florida
    Inventors: Nagarajan Ranganathan, Himanshu Thapliyal