Abstract: A game system includes a processor, the processor being configured to perform a reception process of receiving an operation input by a player; a virtual space setting process of setting a virtual space in which at least one character is disposed; a virtual camera setting process of setting a plurality of virtual cameras; a character process of setting parts constituting the at least one character based on the operation input; and a display process of generating a plurality of character images, which are images of the at least one character viewed from the plurality of virtual cameras, and displaying a character-creation image in which the plurality of character images are arranged on a display section. In the display process, when the setting process of setting the parts is performed, the processor performs a process of displaying the character-creation image on which the result of the setting process is reflected.

Abstract: An electrolyte measuring device includes an electrode unit including at least one detachable ion selective electrode and a detachable reference electrode; a signal input circuit for receiving electric potential from the electrode unit; a differential amplifier circuit that amplifies a difference between output from the ion selective electrode and the reference electrode; a signal processing circuit that calculates ion concentration using a signal from the differential amplifier circuit; a direct current power source that applies direct current voltage exceeding an electromotive force of the ion selective electrode to the electrode unit; and a wiring unit connecting the signal input circuit and the signal processing circuit. The signal processing circuit discriminates a connection state of each ion selective electrode to the device, based on the electric potential when a signal of the signal input circuit via the wiring unit is measured after application of the direct current voltage to the electrode unit.

Abstract: A battery pack and method of manufacturing same are provided. The battery pack can stabilize bending of a lead housed in a space defined by an external package. Leads 2, 3 of a battery element are bonded to a circuit board housed in a top cover 6. A holder 11 is mechanically fitted to the top cover 6, made of resin molded material and produced by injection molding, for example. The edge faces of ribs 12a, 12b, 12c formed on the holder 11 serve as planes which receive the circuit board 4 in the top cover 6. The top cover 6 and the holder 11 fitted to each other are turned 90°, and moved toward the opening in the edge face of the cell 1 while bending the leads 2, 3, which are bent along the contours of both the sidewalls and bottom surface of the holder 11 and housed in a space defined by the external package. The circumferential surface of the top cover 6 is bonded by heat to the inner surface of the external package.

Abstract: A battery pack and method of manufacturing same are provided. The battery pack can stabilize bending of a lead housed in a space defined by an external package. Leads 2, 3 of a battery element are bonded to a circuit board housed in a top cover 6. A holder 11 is mechanically fitted to the top cover 6, made of resin molded material and produced by injection molding, for example. The edge faces of ribs 12a, 12b, 12c formed on the holder 11 serve as planes which receive the circuit board 4 in the top cover 6. The top cover 6 and the holder 11 fitted to each other are turned 90°, and moved toward the opening in the edge face of the cell 1 while bending the leads 2, 3, which are bent along the contours of both the sidewalls and bottom surface of the holder 11 and housed in a space defined by the external package. The circumferential surface of the top cover 6 is bonded by heat to the inner surface of the external package.

Abstract: A semiconductor memory device with low current consumption is disclosed. A bit line selecting circuit (3) establishes electrical connection between a bit line (BL) selected during a read period and a node (N2) in response to bit line connection/selection signals (SB0 to SB4). A charge-up circuit (7) includes PMOS transistors (Q29, Q30). The PMOS transistor (Q29) has a source connected to a power supply (V.sub.DD), a drain connected to a drain of a transistor (Q10) of the bit line selecting circuit (3), and a gate receiving a read control signal (SC). The PMOS transistor (Q30) has a source connected to the power supply (V.sub.DD), a drain connected to the drain of the transistor (Q10) of the bit line selecting circuit (3), and a gate fixed at a ground level.