Patents by Inventor Hiroaki Kosugi

Hiroaki Kosugi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11268621
    Abstract: A hydraulic control apparatus includes an output-side oil passage into which oil from a first oil passage and oil from a second oil passage flow, and a pressure regulating check valve regulating a hydraulic pressure in the second oil passage. The pressure regulating check valve includes first and second elastic portions housed in a spool hole between a valve body and a bottom of the spool hole. A natural length of the second elastic portion is shorter than a distance between the valve body and the bottom when the valve body closes an inflow hole. The second elastic portion applies an elastic force to the valve body in a state in which the valve body opens the inflow hole.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 8, 2022
    Assignees: NIDEC TOSOK CORPORATION, SUBARU CORPORATION
    Inventors: Kunio Kimpara, Masayuki Nojo, Mamoru Murakami, Hiroaki Kosugi
  • Patent number: 10704679
    Abstract: In a hydraulic control device, a first valve device is brought into an open state when a first value obtained by subtracting a value of a pressure in the first output side oil passage from a value of a pressure in the second output side oil passage is equal to or larger than a first threshold value. A second valve device is brought into an open state when an oil pressure in a third connection oil passage is equal to or larger than a second threshold value, and is brought into a closed state when the oil pressure in the third connection oil passage is smaller than the second threshold value. The first value is equal to or larger than the first threshold value and the first valve device is in the open state when the second valve device is in the closed state.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: July 7, 2020
    Assignees: SUBARU CORPORATION, NIDEC TOSOK CORPORATION
    Inventors: Mamoru Murakami, Hiroaki Kosugi, Kunio Kimpara
  • Publication number: 20200182363
    Abstract: A hydraulic control apparatus includes an output-side oil passage into which oil from a first oil passage and oil from a second oil passage flow, and a pressure regulating check valve regulating a hydraulic pressure in the second oil passage. The pressure regulating check valve includes first and second elastic portions housed in a spool hole between a valve body and a bottom of the spool hole. A natural length of the second elastic portion is shorter than a distance between the valve body and the bottom when the valve body closes an inflow hole. The second elastic portion applies an elastic force to the valve body in a state in which the valve body opens the inflow hole.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 11, 2020
    Inventors: Kunio KIMPARA, Masayuki NOJO, Mamoru MURAKAMI, Hiroaki KOSUGI
  • Publication number: 20180274670
    Abstract: In a hydraulic control device, a first valve device is brought into an open state when a first value obtained by subtracting a value of a pressure in the first output side oil passage from a value of a pressure in the second output side oil passage is equal to or larger than a first threshold value. A second valve device is brought into an open state when an oil pressure in a third connection oil passage is equal to or larger than a second threshold value, and is brought into a closed state when the oil pressure in the third connection oil passage is smaller than the second threshold value. The first value is equal to or larger than the first threshold value and the first valve device is in the open state when the second valve device is in the closed state.
    Type: Application
    Filed: March 21, 2018
    Publication date: September 27, 2018
    Inventors: Mamoru MURAKAMI, Hiroaki KOSUGI, Kunio KIMPARA
  • Publication number: 20080152778
    Abstract: Disclosed herein is a method of producing a beverage comprising filtration sterilizing an untreated liquid to yield a filtration sterilized permeable constituent and an impermeable constituent, heating and disinfecting the impermeable constituent, and mixing the heat disinfected impermeable constituent with the filtration sterilized permeable constituent. Also disclosed herein is a beverage produced by such a method and a device for carrying out this method.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 26, 2008
    Inventors: Hiroaki Kosugi, Masahiro Hirano, Hiroshi Hiramatsu
  • Patent number: 7110486
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: September 19, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Publication number: 20060115036
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Application
    Filed: January 18, 2006
    Publication date: June 1, 2006
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Patent number: 7050525
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: May 23, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Patent number: 7038557
    Abstract: An antenna duplexer has an antenna terminal; a transmitting phase-shift circuit, one side of which is connected to the antenna terminal; a receiving phase-shift circuit, one side of which is connected to the antenna terminal; a transmitting filter connected to the other side of the transmitting phase-shift circuit and a transmitting terminal; and a receiving filter connected to the other side of the receiving phase-shift circuit and a receiving terminal; wherein the transmitting filter and/or the receiving filter is a composite filter, and the composite filter attains a characteristic having an attenuation pole at simultaneous transmission and reception time when transmission and reception are simultaneously performed, and controls respective impedances by the transmitting phase-shift circuit and the receiving phase-shift circuit to operate as a sharing unit and attains a characteristic where the attenuation pole is removed at non simultaneous transmission and reception time when transmission and reception
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: May 2, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nakamura, Toshio Ishizaki, Hisashi Adachi, Makoto Sakakura, Hiroaki Kosugi, Hiroyuki Itokawa, Toshiaki Nakamura
  • Patent number: 6825811
    Abstract: A display-antenna integral structure has an antenna and a display wherein said antenna has an antenna element and a grounding plate, said antenna element and said display are opposed to each other, and a part of said display has conductivity and is commonly used as said grounding plate.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: November 30, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Iwai, Atsushi Yamamoto, Koichi Ogawa, Hiroaki Kosugi, Kenichi Yamada
  • Patent number: 6803837
    Abstract: A balun design incorporating the functions of a splitter (combiner) which can be employed in a high power amplifier circuit configuration. The balun is formed of a dielectric multilayer board with conductor patterns on each conductor pattern layer. The balun includes the propagation of a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal. The balun provides the output signals at the first and second opposite-phase output terminals 180° out of phase employing through holes in the main line and coupling lines for promoting electromagnetic coupling therebetween.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: October 12, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Masayuki Miyaji, Hiroaki Kosugi, Shin'ichi Kugou
  • Publication number: 20040081266
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Application
    Filed: December 8, 2003
    Publication date: April 29, 2004
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Shunsuke Hirano, Masakatsu Maeda
  • Patent number: 6717998
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: April 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Publication number: 20040061568
    Abstract: A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics;a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of th
    Type: Application
    Filed: August 22, 2003
    Publication date: April 1, 2004
    Inventors: Kaoru Ishida, Masayuki Miyaji, Hiroaki Kosugi, Shin?apos;ichi Kugou
  • Patent number: 6690249
    Abstract: A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics; a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of t
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: February 10, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Masayuki Miyaji, Hiroaki Kosugi, Shin'ichi Kugou
  • Publication number: 20030197574
    Abstract: A balun design incorporating the functions of a splitter (combiner) which can be employed in a high power amplifier circuit configuration. The balun is formed of a dielectric multilayer board with conductor patterns on each conductor pattern layer. The balun includes the propagation of a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal. The balun provides the output signals at the first and second opposite-phase output terminals 180° out of phase employing through holes in the main line and coupling lines for promoting electromagnetic coupling therebetween.
    Type: Application
    Filed: May 15, 2003
    Publication date: October 23, 2003
    Inventors: Kaoru Ishida, Masayuki Miyaji, Hiroaki Kosugi, Shin?apos;ichi Kugou
  • Patent number: 6590906
    Abstract: To reduce the size of a multi-carrier transmitter circuit for a mobile communication base station, by suppressing instantaneous peak output power to a small value with respect to a wide-band signal of a few MHz to tens of MHz so that the peak factor of a multi-carrier signal is reduced.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: July 8, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Masayuki Miyaji, Hiroaki Kosugi, Shin'ichi Kugou
  • Patent number: 6563395
    Abstract: A balun design incorporating the functions of a splitter (combiner) which can be employed in a high power amplifier circuit configuration. The balun is formed of a dielectric multilayer board with conductor patterns on each conductor pattern layer. The balun includes the propagation of a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal. The balun provides the output signals at the first and second opposite-phase output terminals 180° out of phase employing through holes in the main line and coupling lines for promoting electromagnetic coupling therebetween.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: May 13, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Masayuki Miyaji, Hiroaki Kosugi, Shin'ichi Kugou
  • Publication number: 20030038751
    Abstract: A display-antenna integral structure has an antenna and a display
    Type: Application
    Filed: August 6, 2002
    Publication date: February 27, 2003
    Inventors: Hiroshi Iwai, Atsushi Yamamoto, Koichi Ogawa, Hiroaki Kosugi, Kenichi Yamada
  • Publication number: 20020186757
    Abstract: An antenna duplexer has an antenna terminal;
    Type: Application
    Filed: February 27, 2002
    Publication date: December 12, 2002
    Inventors: Hiroyuki Nakamura, Toshio Ishizaki, Hisashi Adachi, Makoto Sakakura, Hiroaki Kosugi, Hiroyuki Itokawa, Toshiaki Nakamura