Patents by Inventor Hiroaki Ugawa

Hiroaki Ugawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10882043
    Abstract: In a urine sampling container 1, a retaining mechanism 15 is provided on opening end sides of a urine collection tube 3 and a cover tube 4 to prevent the cover tube 4 from being removed from the urine collection tube 3 in a state in which the urine collection tube 3 is inserted to and fitted in the cover tube 4, so as to keep the urine collection tube 3 and a storage tube 2 securely coupled with each other at the time of urine collection and to allow the storage tube 2 to be easily removed from the urine collection tube 3 at the time of examination.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 5, 2021
    Assignee: Atleta Co., Ltd.
    Inventors: Hiroaki Ugawa, Ichiro Morimoto, Satoshi Miyatake
  • Patent number: 10203361
    Abstract: An impedance measurement method is provided having a certain level of measurement sensitivity across all ranges of impedance and capable of covering a wide measurement range. In the method, a device under test (DUT) is connected in series or in parallel to a signal line, a measurement signal is transmitted from a signal source, an input signal a1 into the DUT, a reflected signal reflected from the DUT, and a passed signal that passed through the DUT are measured, S-parameters S11 and S21 are calculated based on respective measured values of the input signal, the reflected signal, and the passed signal, and an impedance Zx of the DUT is calculated based on a formula: Zx=2Z0S11/S21, where Z0 is a characteristic impedance.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: February 12, 2019
    Assignee: Keysight Technologies, Inc.
    Inventor: Hiroaki Ugawa
  • Publication number: 20180311667
    Abstract: In a urine sampling container 1, a retaining mechanism 15 is provided on opening end sides of a urine collection tube 3 and a cover tube 4 to prevent the cover tube 4 from being removed from the urine collection tube 3 in a state in which the urine collection tube 3 is inserted to and fitted in the cover tube 4, so as to keep the urine collection tube 3 and a storage tube 2 securely coupled with each other at the time of urine collection and to allow the storage tube 2 to be easily removed from the urine collection tube 3 at the time of examination.
    Type: Application
    Filed: April 28, 2016
    Publication date: November 1, 2018
    Inventors: Hiroaki UGAWA, Ichiro MORIMOTO, Satoshi MIYATAKE
  • Publication number: 20140002109
    Abstract: An impedance measurement method is provided having a certain level of measurement sensitivity across all ranges of impedance and capable of covering a wide measurement range. In the method, a device under test (DUT) is connected in series or in parallel to a signal line, a measurement signal is transmitted from a signal source, an input signal a1 into the DUT, a reflected signal reflected from the DUT, and a passed signal that passed through the DUT are measured, S-parameters S11 and S21 are calculated based on respective measured values of the input signal, the reflected signal, and the passed signal, and an impedance Zx of the DUT is calculated based on a formula: Zx=2Z0S11/S21, where Z0 is a characteristic impedance.
    Type: Application
    Filed: May 31, 2013
    Publication date: January 2, 2014
    Inventor: Hiroaki Ugawa
  • Publication number: 20070225927
    Abstract: A method for measuring noise of signals under test by frequency converting the signals under test to generate a first intermediate signals, frequency converting the signals under test to generate a second intermediate signals having frequency different from that of the first intermediate signals, and measuring the noise of signals under test from the first and the second intermediate signals using cross correlation processing or cross spectrum processing. The apparatus measures the phase noise of signals under test using this method.
    Type: Application
    Filed: April 5, 2007
    Publication date: September 27, 2007
    Inventors: Masaki Bessho, Hiroaki Ugawa, Junichi Iwai, Koji Murata
  • Publication number: 20050238094
    Abstract: A method measuring the phase noise of signals under test by generating first phase signals representing the phase of signals under test using first local signals generated while referring to first reference signals, generating second phase signals representing the phase of signals under test using second local signals generated while referring to second reference signals having a frequency different from that of the first reference signals, and finding the cross correlation or cross spectrum between the first phase signals and second phase signals. The apparatus of the present invention measures the phase noise of signals under test using this method.
    Type: Application
    Filed: April 8, 2005
    Publication date: October 27, 2005
    Inventors: Masaki Bessho, Hiroaki Ugawa
  • Patent number: 6710256
    Abstract: An apparatus and a method for connecting high-frequency circuit boards, and for providing an electrical connection between respective electrodes of two high-frequency circuit boards includes an electrode connecting member including a bar-shaped member having a predetermined sectional shape, and having connecting electrodes formed on a part of an outer periphery of the bar-shaped member. The connecting electrodes are located so as to provide an inter-connection between the respective electrodes of the two high-frequency circuit boards through the connecting electrodes and to be sandwiched between the respective electrodes thereof. The connecting electrodes are preferably composed of a plurality of electrode lines formed so as to be spaced at a predetermined interval on the outer periphery of the bar-shaped member.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: March 23, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Kenichi Kato, Hiroaki Ugawa, Toshiki Kita
  • Publication number: 20020074157
    Abstract: In an apparatus and a method for connecting high-frequency circuit boards, for providing electrical connection between respective electrodes of two high-frequency circuit boards, there is provided with an electrode connecting member including a bar-shaped member having a predetermined sectional shape, and including connecting electrodes formed on a part of an outer periphery of the bar-shaped member. The connecting electrodes are located so as to provide inter-connection between the respective electrodes of the two high-frequency circuit boards through the connecting electrodes and to be sandwiched between the respective electrodes thereof. The connecting electrodes are preferably constituted by a plurality of electrode lines formed so as to be spaced at a predetermined interval on the outer periphery of the bar-shaped member.
    Type: Application
    Filed: September 20, 2001
    Publication date: June 20, 2002
    Applicant: Agilent Technologies, Inc.
    Inventors: Kenichi Kato, Hiroaki Ugawa, Toshiki Kita
  • Patent number: 6195215
    Abstract: The invention is directed toward a measuring apparatus for measuring performance characteristics of a recording unit including a recording medium on which one track is divided into a plurality of sectors. The measuring apparatus includes a writing means for writing a write signal with a write parameter, a first control means for changing the write parameter value for respective sectors, a reading means for reading out the write signal written by the writing means with a read parameter and measuring the read-out write signal as a read signal, and a second control means for controlling the read parameter so as to produce predetermined read parameter values for respective sectors.
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: February 27, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Yoshiyuki Yanagimoto, Hiroaki Ugawa, Atsushi Hattori, Nobuhiro Shitara
  • Patent number: 5822331
    Abstract: A system efficiently determines and stores in memory the logical bit positions of bits in which bit errors have occurred in digital recording devices, etc. The system measures bit errors by comparing a test bit string with a correct bit string, and includes a bit string memory that stores the correct bit string, a word comparator for comparing corresponding words from the test bit string and the correct bit string, an error word content memory that stores the contents of the words containing errors, and an error word position information memory that shows the positions in the correct bit string which correspond to error words in the test bit string that contain the errors. Bit error information in a desired visual format is obtained by performing calculation processing on these memory values.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: October 13, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Hiroaki Ugawa, Atsushi Hattori
  • Patent number: 5610952
    Abstract: A synchronization signal generation device includes a circuit that enables a phase difference between a synchronization signal and an input signal with intermittent edges to be arbitrarily and continuously varied. The synchronization signal generating device is of the second order phase locked loop and has a phase detector with the following elements: a circuit for generating pulses with widths corresponding to the phase difference between the input signal and the synchronization signal only upon occurrence of an edge of the input signal; a circuit for generating pulses with a constant width only upon occurrence of an edge of the input signal or the synchronization signal; a variation circuits which varies one or both of the amplitudes of the aforesaid pulses; and a combining circuit which adds or subtracts the pulses from the variation circuits to derive a phase comparison signal.
    Type: Grant
    Filed: November 17, 1995
    Date of Patent: March 11, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Ken Yamanaka, Hiroaki Ugawa