Abstract: To achieve efficient reading of data from a memory including a plurality of banks by specifying different banks and accessing the memory from a plurality of hash computation circuits simultaneously, an information processing device includes a memory 1 including a plurality of banks, a plurality of hash computation circuits 8, and an interconnect 2 respectively connecting the banks in the memory 1 and the hash computation circuits 8 to each other, wherein the hash computation circuits 8 execute control in such a manner that read requests for reading data from the memory 1 respectively include bank numbers for specifying different banks in the same cycle.

Abstract: To achieve efficient reading of data from a memory including a plurality of banks by specifying different banks and accessing the memory from a plurality of hash computation circuits simultaneously, an information processing device includes a memory 1 including a plurality of banks, a plurality of hash computation circuits 8, and an interconnect 2 respectively connecting the banks in the memory 1 and the hash computation circuits 8 to each other, wherein the hash computation circuits 8 execute control in such a manner that read requests for reading data from the memory 1 respectively include bank numbers for specifying different banks in the same cycle.