Abstract: A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.

Abstract: A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.

Abstract: A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.

Abstract: A step part is formed on a face of a retainer ring that contacts with a polishing pad so that a wavily deformed part of the polishing pad enters the step part. The step part is formed like a ring at the inside of the face which actually contacts with the polishing pad. Moreover, a height of the step part is smaller than a thickness of a wafer so that a top face of the step part does not contact with the polishing pad and the wafer does not enter the step part. Further, a width of the step part is set so that the wavily deformed part of the polishing pad can enter the step part.

Abstract: In a semiconductor storage device, an access transistor, which has a gate electrode and a pair of impurity diffusion layers, is formed at a device activation region defined by a device isolation structure of a semiconductor substrate. A first insulating film, which has a first contact hole for exposing a portion of the surface of one of the pair of impurity diffusion layers, is formed over the access transistor. A protective film, which has a second contact hole formed on the first contact hole, is formed on the first insulating film. A second insulating film is formed on the side wall faces of the first and second contact holes. A memory capacitor has a lower electrode and an upper part electrode which are opposed each other and are capacitive-coupled through a dielectric film.

Abstract: A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.

Abstract: In a semiconductor storage device, an access transistor, which has a gate electrode and a pair of impurity diffusion layers, is formed at a device activation region defined by a device isolation structure of a semiconductor substrate. A first insulating film, which has a first contact hole for exposing a portion of the surface of one of the pair of impurity diffusion layers, is formed over the access transistor. A protective film, which has a second contact hole formed on the first contact hole, is formed on the first insulating film. A second insulating film is formed on the side wall faces of the first and second contact holes. A memory capacitor has a lower electrode and an upper part electrode which are opposed each other and are capacitive-coupled through a dielectric film.

Abstract: A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.

Abstract: A semiconductor memory device has access transistors with a gate and a pair of impurity diffusion layers formed on a semiconductor substrate and memory capacitors with a storage node electrode and a cell plate electrode. The electrodes are connected to each other via a capacitive insulating layer made of a ferroelectric material. The storage node electrode has a surface covered with the capacitive insulating layer and is formed in a shape of column on one of the pair of impurity diffusion layers in a hole formed from an inter-layer insulating film covering the access transistor to the one of the pair of impurity diffusion layers. A upper surface of the column does not exceed the inter-layer insulating film. The storage node electrode formed in the hole face the cell plate electrode via the inter-layer insulating film.

Abstract: A step part is formed on a face of a retainer ring that contacts with a polishing pad so that a wavily deformed part of the polishing pad enters the step part. The step part is formed like a ring at the inside of the face which actually contacts with the polishing pad. Moreover, a height of the step part is smaller than a thickness of a wafer so that a top face of the step part does not contact with the polishing pad and the wafer does not enter the step part. Further, a width of the step part is set so that the wavily deformed part of the polishing pad can enter the step part.

Abstract: In a semiconductor storage device, an access transistor, which has a gate electrode and a pair of impurity diffusion layers, is formed at a device activation region defined by a device isolation structure of a semiconductor substrate. A first insulating film, which has a first contact hole for exposing a portion of the surface of one of the pair of impurity diffusion layers, is formed over the access transistor. A protective film, which has a second contact hole formed on the first contact hole, is formed on the first insulating film. A second insulating film is formed on the side wall faces of the first and second contact holes. A memory capacitor has a lower electrode and an upper part electrode which are opposed each other and are capacitive-coupled through a dielectric film.

Abstract: In a semiconductor storage device, an access transistor, which has a gate electrode and a pair of impurity diffusion layers, is formed at a device activation region defined by a device isolation structure of a semiconductor substrate. A first insulating film, which has a first contact hole for exposing a portion of the surface of one of the pair of impurity diffusion layers, is formed over the access transistor. A protective film, which has a second contact hole formed on the first contact hole, is formed on the first insulating film. A second insulating film is formed on the side wall faces of the first and second contact holes. A memory capacitor has a lower electrode and an upper part electrode which are opposed each other and are capacitive-coupled through a dielectric film.

Abstract: Surfaces of substrates, typically semiconductor device substrates, are polished with a polishing agent comprising polishing abrasive grains of a metal oxide (e.g. cerium oxide, zirconium oxide or manganese oxide) having a hydrophilic surface and a surface potential (zeta potential) of not more than 50 mV at pH 7 in absolute value, preferably polishing abrasive grains having hydrophilic groups, preferably hydroxyl groups, at the extremities and then cleaned with an aqueous cleaning solution comprising pure water. The polishing abrasive grains remaining on the polished substrate surface can be removed to a satisfactory degree therefrom by simple cleaning using the aqueous cleaning solution only.

Abstract: When the surface of a semiconductor device having at least two different films formed on a substrate is flattened by chemical mechanical polishing, the abrasion resistance upon polishing is detected by strain gauges provided close to the surface of the semiconductor device to be polished. In addition, the end of the polishing process is determined on the basis of the amount of change of the detected signals produced from the strain gauges.

Abstract: A pair of electrically conductive regions of ruthenium dioxide are formed on a BPSG film covering DRAM memory cells arranged in a matrix form. The conductive region is extended in a column direction to be connected to one of impurity diffused regions of MOS transistors of the memory cells at contact holes, and also connected to one of impurity diffused regions of MOS transistors of column direction selection. Formed beneath the conductive region (capacitor upper electrodes) are capacitor lower electrodes connected to the other impurity diffused regions of the memory cell MOS transistors and a high-dielectric film. The conductive region is connected to a (1/2)Vcc power supply. Since the upper electrodes and wiring lines of capacitors can be formed at the same time, the number of steps in a fabrication method can be reduced.

Abstract: When a thin metal film is formed on a substrate at a constant substrate temperature by chemical vapor deposition while alternately and discontinuously introducing a raw material gas and a reducing gas onto the substrate, reducing the raw material gas with the reducing gas on the substrate, thereby conducting chemical vapor deposition, and repeating the chemical vapor deposition to obtain a desired film thickness, a thin metal film having a good surface flatness without any current leakage can be obtained without etching the substrate wafer, and when the reducing gas is excited to excited species by an exciting means at the introduction of the reducing gas and the excited species is used be reduce the raw material gas, a lower substrate temperature can be used and chemical vapor deposition process time can be made shorter than without using the exciting means.

Abstract: In manufacturing a high-temperature superconductive oxide thin film by irradiating a laser beam onto an oxide target in an atmosphere of oxygen to form the high-temperature superconductive oxide thin film on an oxide substrate, the laser beam is irradiated from a back surface of the substrate and is transmitted through the substrate, and thereafter the laser beam is irradiated onto the oxide target.