Abstract: A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes a resistor and a capacitor and that smoothes the charge pump current and converts the smoothed current into a control voltage; a voltage-controlled oscillator that generates an oscillation signal with a frequency according to the control voltage; and a frequency divider that generates a frequency-divided signal by frequency-dividing the oscillation signal and outputs the frequency-divided signal to the phase comparator as the feedback signal, wherein the resistor in the low-pass filter is a variable resistor that is changed according to the control voltage.

Abstract: A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes a resistor and a capacitor and that smoothes the charge pump current and converts the smoothed current into a control voltage; a voltage-controlled oscillator that generates an oscillation signal with a frequency according to the control voltage; and a frequency divider that generates a frequency-divided signal by frequency-dividing the oscillation signal and outputs the frequency-divided signal to the phase comparator as the feedback signal, wherein the resistor in the low-pass filter is a variable resistor that is changed according to the control voltage.

Abstract: A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes a resistor and a capacitor and that smoothes the charge pump current and converts the smoothed current into a control voltage; a voltage-controlled oscillator that generates an oscillation signal with a frequency according to the control voltage; and a frequency divider that generates a frequency-divided signal by frequency-dividing the oscillation signal and outputs the frequency-divided signal to the phase comparator as the feedback signal, wherein the resistor in the low-pass filter is a variable resistor that is changed according to the control voltage.

Abstract: There is provided a voltage controlled ring oscillator having a plurality of ring-connected amplifiers (401), and a plurality of variable capacitance elements (502a, 502b) being respectively connected to the plurality of amplifiers and having capacitances varied by a voltage control. A plurality of load resistors (402) and a plurality of tail current sources (403) are respectively connected to the plurality of amplifiers.

Abstract: A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes a resistor and a capacitor and that smoothes the charge pump current and converts the smoothed current into a control voltage; a voltage-controlled oscillator that generates an oscillation signal with a frequency according to the control voltage; and a frequency divider that generates a frequency-divided signal by frequency-dividing the oscillation signal and outputs the frequency-divided signal to the phase comparator as the feedback signal, wherein the resistor in the low-pass filter is a variable resistor that is changed according to the control voltage.

Abstract: There is provided a voltage controlled ring oscillator having a plurality of ring-connected amplifiers (401), and a plurality of variable capacitance elements (502a, 502b) being respectively connected to the plurality of amplifiers and having capacitances varied by a voltage control. A plurality of load resistors (402) and a plurality of tail current sources (403) are respectively connected to the plurality of amplifiers.

Abstract: There is provided an oscillator having first and second oscillating units (301a, 301c) outputting signals having phases in a mutually orthogonal relationship, in which simultaneous connection of a plurality of current sources to the first and second oscillating units does not occur, and only one current source (303a) is connected thereto at any point of time. For example, the current source is connected in common to the first and second oscillating units. The first and second oscillating units each have a CML type differential amplifier including a delay element of a resistor and a capacitor and form a ring oscillator to be ring connected.

Abstract: An oscillator for ensuring the phase relationship between two resonant circuits coupled by a coupling circuit. A first resonant circuit outputs two signals having different phases, and a second resonant circuit outputs two signals having different phases. The coupling circuit includes a plurality of inverters connected in a ring manner, and couples the first resonant circuit and the second resonant circuit such that the two signals output from the first resonant circuit and the two signals output from the second resonant circuit have different phases. A filter is connected to the input side of each of the plurality of inverters. With this structure, a signal output from each of the plurality of inverters has either a phase lead or a phase lag according to the phase characteristics of the corresponding filter, and thus the phase relationship between the first resonant circuit and the second resonant circuit is ensured.

Abstract: An oscillator for ensuring the phase relationship between two resonant circuits coupled by a coupling circuit. A first resonant circuit outputs two signals having different phases, and a second resonant circuit outputs two signals having different phases. The coupling circuit includes a plurality of inverters connected in a ring manner, and couples the first resonant circuit and the second resonant circuit such that the two signals output from the first resonant circuit and the two signals output from the second resonant circuit have different phases. A filter is connected to the input side of each of the plurality of inverters. With this structure, a signal output from each of the plurality of inverters has either a phase lead or a phase lag according to the phase characteristics of the corresponding filter, and thus the phase relationship between the first resonant circuit and the second resonant circuit is ensured.

Abstract: A bias current IB additionally provided to a current-controlled circuit 13 in a PLL circuit is the sum of bias currents IB1 and IB2 which are generated by a bias adjustment circuit (18, 19, 20, 21 and 22) and a bias current generating circuit (23 and 24), respectively. The bias adjustment circuit adjusts the bias current IB1 in response to an adjustment start signal ADJ such that a control voltage VC converges to a reference voltage VREF, and ceases the adjustment when the convergence has been achieved. The reference voltage VREF is determined to be a value at an almost middle point in a range of the variable VC in the PLL circuit. The bias current generating circuit has a circuit 23 generating a bias voltage VT and a circuit 24 converting the VT into a current IB2, wherein the temperature characteristic of the bias voltage VT is reverse to that of the control voltage VC under the condition that the frequency of an oscillation signal OCLK is fixed.

Abstract: A bias current IB additionally provided to a current-controlled circuit 13 in a PLL circuit is the sum of bias currents IB1 and IB2 which are generated by a bias adjustment circuit (18, 19, 20, 21 and 22) and a bias current generating circuit (23 and 24), respectively. The bias adjustment circuit adjusts the bias current IB1 in response to an adjustment start signal ADJ such that a control voltage VC converges to a reference voltage VREF, and ceases the adjustment when the convergence has been achieved. The reference voltage VREF is determined to be a value at an almost middle point in a range of the variable VC in the PLL circuit. The bias current generating circuit has a circuit 23 generating a bias voltage VT and a circuit 24 converting the VT into a current IB2, wherein the temperature characteristic of the bias voltage VT is reverse to that of the control voltage VC under the condition that the frequency of an oscillation signal OCLK is fixed.