Patents by Inventor Hiroki Kanai

Hiroki Kanai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040078517
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Application
    Filed: July 28, 2003
    Publication date: April 22, 2004
    Applicant: HITACHI, LTD.
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Publication number: 20040034737
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Application
    Filed: August 20, 2003
    Publication date: February 19, 2004
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Patent number: 6684295
    Abstract: A disk array control device includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention, the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: January 27, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
  • Patent number: 6647461
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: November 11, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Publication number: 20030204649
    Abstract: A disk control device of the present invention comprises a plurality of disk control units. Each disk control unit includes: at least one channel controller having an interface to a host computer; at least one disk controller having an interface to a disk device; and an internal coupling for connecting the channel controller, the disk controller, and a cache memory for temporarily storing data to be written to or read from the disk device. The disk control device further comprises: a first coupling unit for connecting the internal coupling of each disk control unit to read or write data within the disk control device; and a second coupling unit for connecting the internal coupling of each disk control unit to transfer data between a plurality of the disk control devices.
    Type: Application
    Filed: March 3, 2003
    Publication date: October 30, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Seiji Kaneko
  • Publication number: 20030200377
    Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Application
    Filed: May 13, 2003
    Publication date: October 23, 2003
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
  • Patent number: 6629204
    Abstract: The disk array controller includes a plurality of interfaces with respective processors for connecting with a host computer or disk devices, duplicated shared memories connected in a one to one ratio between each interface and respective access paths, a selector connected to the plurality of interfaces, and a cache memory connected to the selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor performs dual writing in the duplicated shared memories.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: September 30, 2003
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd., Hitachi Video and Information System, Inc.
    Inventors: Atsushi Tanaka, Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai, Nobuyuki Minowa, Hikari Mikami, Makoto Asari
  • Publication number: 20030131192
    Abstract: A clustering disk subsystem comprising a switch holding a table which can modify a destination of a request from a host computer, wherein the switch transfers an access request to another channel according to a destination channel status such as heavy load or fault, and the channel which received the request processes the request by proxy for load balancing between internal disk controllers in a clustering disk subsystem. The subsystem has an effect in which load balancing or fail-over between channels or disk controllers can be performed without any special hardware or software in the host. As a result, good performance can be obtained even when access requests from the host computer are concentrated in a specific channel or disk controller.
    Type: Application
    Filed: March 6, 2002
    Publication date: July 10, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Shuji Nakamura, Kazuhisa Fujimoto, Hiroki Kanai, Akira Yoshida
  • Publication number: 20030110355
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Application
    Filed: January 3, 2003
    Publication date: June 12, 2003
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Publication number: 20030110354
    Abstract: A disk array controller installed with a plurality of interfaces with the host computer or disk device, duplicated shared memories connected in a ratio of one to one between each interface and respective access path, a selector connected to the plurality of interfaces, and a cache memory connected to said selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor for the plurality of interfaces performs dual writing in the duplicated shared memories.
    Type: Application
    Filed: November 15, 2002
    Publication date: June 12, 2003
    Applicants: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd., Hitachi Video and Information System, Inc.
    Inventors: Atsushi Tanaka, Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai, Nobuyuki Minowa, Hikari Mikami, Makoto Asari
  • Publication number: 20030055943
    Abstract: The present invention enables a disk controller to make consolidated management of a great number of drives connected to a network provided within a disk subsystem and makes it possible to allocate drives to an external apparatus that needs to use some drives and connects to a network so that the external apparatus can use the drives allocated to it. The disk subsystem includes the disk controller and drives connected via a device area network and allocates one or more drives in the subsystem to an external apparatus that needs to use some drives (such as a disk controller of another disk subsystem or NAS). The external apparatus that needs to use some drives can directly connect to the above network within the subsystem. The disk controller is provided with a device allocation table and manages the allocation of the drives to external apparatuses that can use the drives. The disk controller also manages the configuration of the devices connected to the above network.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 20, 2003
    Inventor: Hiroki Kanai
  • Patent number: 6519680
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: February 11, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Publication number: 20030005221
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Application
    Filed: September 5, 2002
    Publication date: January 2, 2003
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Patent number: 6502167
    Abstract: The disk array controller includes a plurality of interfaces with respective processors for connecting with a host computer or disk devices, duplicated shared memories connected in a one to one ratio between each interface and respective access paths, a selector connected to the plurality of interfaces, and a cache memory connected to the selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor performs dual writing in the duplicated shared memories.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: December 31, 2002
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd., Hitachi Video and Information System, Inc.
    Inventors: Atsushi Tanaka, Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai, Nobuyuki Minowa, Hikari Mikami, Makoto Asari
  • Publication number: 20020169901
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Application
    Filed: July 25, 2001
    Publication date: November 14, 2002
    Applicant: Hitachi. Ltd.
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai
  • Patent number: 6477619
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes interconnections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: November 5, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Patent number: 6470391
    Abstract: A communication controller at the sending computer divides data transferred from a host into sub-ACK unit packets, and transfers them sequentially to a destination without waiting for the sub-ACK's being subsequently provided by the destination. A communication controller at the receiving computer issues a sub-ACK to the sending computer for each of the sub-ACK unit packet, if the sub-ACK packet has been normally received and otherwise issues retransmission request for the sub-ACK unit packets and merges data included in the sub-ACK unit packets into the initial data, after they are normally received.
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: October 22, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yoshifumi Takamoto, Hiroki Kanai, Tadahiro Takase, Katsuyoshi Kitai, Yoshimasa Masuoka
  • Publication number: 20020152181
    Abstract: The present invention provides a service method of rental storage, which, when a rental storage service provider provides a rental storage for rental storage service users, allows ideal use of storages in correspondence with the billing charge to the users by proposing the most optimum contract options to the users, and which allows suppressing the management cost of the users.
    Type: Application
    Filed: August 2, 2001
    Publication date: October 17, 2002
    Applicant: Hitachi Ltd.
    Inventors: Hiroki Kanai, Tatsumi Uchigiri, Kazuhisa Fujimoto
  • Patent number: 6449631
    Abstract: A communication controller at the sending computer divides data transferred from a host into sub-ACK unit packets, and transfers them sequentially to a destination without waiting for the sub-ACK's being subsequently provided by the destination. A communication controller at the receiving computer issues a sub-ACK to the sending computer for each of the sub-ACK unit packet, if the sub-ACK packet has been normally received and otherwise issues retransmission request for the sub-ACK unit packets and merges data included in the sub-ACK unit packets into the initial data, after they are normally received.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: September 10, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yoshifumi Takamoto, Hiroki Kanai, Tadahiro Takase, Katsuyoshi Kitai, Yoshimasa Masuoka
  • Publication number: 20020095551
    Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Application
    Filed: March 19, 2002
    Publication date: July 18, 2002
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa