Abstract: A fixing member having an endless belt shape or a roller shape includes a base layer and a surface layer. The surface layer contains a tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, and has a pore communicating with an opening of an outer surface thereof. Perfluoropolyether is contained in at least a part of the pores. A ratio (E?(1)/E?(2)) is 0.60 to 1.00, where E?(1) is an average value of loss elastic moduli E? of the surface layer in a direction orthogonal to a circumferential direction of the fixing member measured at a frequency of 10 Hz at 100 to 150° C., and E?(2) is an average value of loss elastic moduli E? of the surface layer in a direction orthogonal to the circumferential direction of the fixing member measured at a frequency of 10 Hz at 100 to 150° C. after removal of the perfluoropolyether contained in the pore.

Abstract: A fixing member having a base layer and a surface layer, wherein the surface layer includes a tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, and having at least one pore communicating with an opening on an outer surface thereof. A composition containing perfluoropolyether and a fluoropolymer is contained in at least a part of the at least one pore. The fluoropolymer has a particular repeating unit composed of perfluoropolyether, and at least one structure selected from the group consisting of a T unit of siloxane and a Q unit of siloxane.

Abstract: A fixing member having a base layer and a surface layer, wherein the surface layer includes a tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, and having at least one pore communicating with an opening on an outer surface thereof. A composition containing perfluoropolyether and a fluoropolymer is contained in at least a part of the at least one pore. The fluoropolymer has a particular repeating unit composed of perfluoropolyether, and at least one structure selected from the group consisting of a T unit of siloxane and a Q unit of siloxane.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a first surface on one side thereof and a second surface on an opposite side thereof, and having an element therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein, the second semiconductor layer being formed at the one side of the first surface of the first semiconductor layer, an insulating layer disposed on the first surface of the first semiconductor layer, and a charge-attracting layer configured to attract electrical charges generated in the insulating layer when a predetermined voltage is supplied to the charge-attracting layer.

Abstract: There is provided a semiconductor device and a method for manufacturing a semiconductor device. Within the N-type semiconductor layer formed from a high resistance N-type substrate, the P-type well diffusion layer and P-type extraction layer are formed and are fixed to ground potential. Due thereto, a depletion layer spreading on the P-type well diffusion layer side does not reach the interlayer boundary between the P-type well diffusion layer and the buried oxide film. Hence, the potential around the surface of the P-type well diffusion layer is kept at a ground potential. Accordingly, when the voltages are applied to the backside of the N-type semiconductor layer and a cathode electrode, a channel region at the MOS-type semiconductor formed as a P-type semiconductor layer is not activated. Due thereto, leakage current that may occur independently of a control due to the gate electrode of a transistor can be suppressed.

Abstract: A semiconductor device including a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a first surface on one side thereof and a second surface on an opposite side thereof, and having an element therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein, the second semiconductor layer being formed at the one side of the first surface of the first semiconductor layer, an insulating layer disposed on the first surface of the first semiconductor layer, and a charge-attracting layer configured to attract electrical charges generated in the insulating layer when a predetermined voltage is supplied to the charge-attracting layer.

Abstract: A semiconductor device including a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.

Abstract: A semiconductor device includes an SOI substrate formed of a first semiconductor layer having a first conductive type, an embedded oxide film, and a circuit layer; and an interlayer insulation film formed on the SOI substrate. The SOI substrate has a circuit element region and an outer circumferential region surrounding the circuit element region. The circuit layer includes a plurality of single pixel circuits arranged in an array pattern. The single pixel circuit includes a circuit element, a diode, and a conductive portion. The diode includes a first region formed on the first semiconductor layer and a first conductive member formed on the interlayer insulation film and electrically connected to the first region. The conductive portion is electrically isolated from other elements. The conductive portion includes a second region formed on the first semiconductor layer and an electrode formed on the interlayer insulation film.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a primary surface on one side thereof and a secondary surface on an opposite side thereof, and having a sensor therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein, the second semiconductor layer being formed at said one side of the primary surface of the first semiconductor layer, an insulating layer formed between the first semiconductor layer and the second semiconductor layer, and being disposed on the primary surface of the first semiconductor layer, and a charge-attracting semiconductor layer of the first conductivity type configured to attract electrical charges generated in the insulating layer when a fixed voltage is supplied to the charge-attracting semiconductor layer.

Abstract: A semiconductor device including: a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.

Abstract: There is provided a semiconductor device and a method for manufacturing a semiconductor device. Within the N-type semiconductor layer formed from a high resistance N-type substrate, the P-type well diffusion layer and P-type extraction layer are formed and are fixed to ground potential. Due thereto, a depletion layer spreading on the P-type well diffusion layer side does not reach the interlayer boundary between the P-type well diffusion layer and the buried oxide film. Hence, the potential around the surface of the P-type well diffusion layer is kept at a ground potential. Accordingly, when the voltages are applied to the backside of the N-type semiconductor layer and a cathode electrode, a channel region at the MOS-type semiconductor formed as a P-type semiconductor layer is not activated. Due thereto, leakage current that may occur independently of a control due to the gate electrode of a transistor can be suppressed.

Abstract: A semiconductor device includes an SOI substrate formed of a first semiconductor layer having a first conductive type, an embedded oxide film, and a circuit layer; and an interlayer insulation film formed on the SOI substrate. The SOI substrate has a circuit element region and an outer circumferential region surrounding the circuit element region. The circuit layer includes a plurality of single pixel circuits arranged in an array pattern. The single pixel circuit includes a circuit element, a diode, and a conductive portion. The diode includes a first region formed on the first semiconductor layer and a first conductive member formed on the interlayer insulation film and electrically connected to the first region. The conductive portion is electrically isolated from other elements. The conductive portion includes a second region formed on the first semiconductor layer and an electrode formed on the interlayer insulation film.

Abstract: There is provided a semiconductor device and a method for manufacturing a semiconductor device. Within the N-type semiconductor layer formed from a high resistance N-type substrate, the P-type well diffusion layer and P-type extraction layer are formed and are fixed to ground potential. Due thereto, a depletion layer spreading on the P-type well diffusion layer side does not reach the interlayer boundary between the P-type well diffusion layer and the buried oxide film. Hence, the potential around the surface of the P-type well diffusion layer is kept at a ground potential. Accordingly, when the voltages are applied to the backside of the N-type semiconductor layer and a cathode electrode, a channel region at the MOS-type semiconductor formed as a P-type semiconductor layer is not activated. Due thereto, leakage current that may occur independently of a control due to the gate electrode of a transistor can be suppressed.

Abstract: A semiconductor device includes a first semiconductor layer; an insulation member layer formed on the first semiconductor layer; a transistor disposed in an upper portion of the insulation member layer; a first interlayer insulation film covering the transistor; a layered member including a wiring layer formed on the first interlayer insulation film and a second interlayer insulation film; and a first penetrating electrode penetrating through the insulation member layer, the first interlayer insulation film, and the layered member. The first penetrating electrode is electrically connected only to the first semiconductor layer.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a primary surface on one side thereof and a secondary surface on an opposite side thereof, and having a sensor therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein, the second semiconductor layer being formed at said one side of the primary surface of the first semiconductor layer, an insulating layer formed between the first semiconductor layer and the second semiconductor layer, and being disposed on the primary surface of the first semiconductor layer, and a charge-attracting semiconductor layer of the first conductivity type configured to attract electrical charges generated in the insulating layer when a fixed voltage is supplied to the charge-attracting semiconductor layer.

Abstract: The present disclosure provides a semiconductor device including: a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a primary surface and having a sensor therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein. The second semiconductor layer is formed at a same side of the primary surface of the first semiconductor layer. The device further includes an insulating layer formed between the first semiconductor layer and the second semiconductor layer. The insulating layer is disposed on the primary surface of the first semiconductor layer and surrounds the circuit element, and includes a charge-attracting semiconductor pattern of the first conductivity type that is disposed near the circuit element so as to attract electrical charges generated in the insulating layer.

Abstract: The present disclosure provides a semiconductor device including: a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.

Abstract: The present disclosure provides a semiconductor device including: a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.