Patents by Inventor Hiroki Kishi
Hiroki Kishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230422505Abstract: A semiconductor memory device includes: a stack having an insulating layer and a conductive layer, each layer being stacked alternately in a first direction; a semiconductor layer through the insulating and the conductive layer; a memory layer between the stack and the semiconductor layer in a second direction; and an insulation extending from the insulating layer toward the semiconductor layer in the second direction. The insulation and the memory layer define an interface therebetween in a cross-section, the interface having a first point and a second point, the first point overlapping with a middle portion of the insulating layer, the second point overlapping with an end portion of the insulating layer. The second point is closer to the insulating layer in the second direction than the first point is. The interface curves from the first point to the second point to protrude toward the semiconductor layer.Type: ApplicationFiled: June 12, 2023Publication date: December 28, 2023Applicant: Kioxia CorporationInventors: Ryota FUJITSUKA, Takanori YAMANAKA, Hiroki KISHI
-
Patent number: 11758728Abstract: In one embodiment, a semiconductor device includes a stacked film alternately including a plurality of electrode layers and a plurality of insulating layers, a charge storage layer provided on a side face of the stacked film via a first insulator, and a semiconductor layer provided on a side face of the charge storage layer via a second insulator. The device further includes a third insulator provided between an electrode layer and an insulating layer in the stacked film and between the electrode layer and the first insulator, and a first film provided between the third insulator and the insulating layer and/or between the third insulator and the first insulator, and including carbon, germanium, tin, aluminum, phosphorus or arsenic.Type: GrantFiled: August 5, 2021Date of Patent: September 12, 2023Assignee: Kioxia CorporationInventors: Takanori Yamanaka, Ryota Fujitsuka, Hiroki Kishi
-
Patent number: 11521886Abstract: An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a heat transfer medium to a space formed between the focus ring and the electrostatic chuck, and a plurality of electrodes provided at a region in the electrostatic chuck which corresponds to the focus ring. The electrostatic chucking method includes supplying by the supply unit the heat transfer medium to the space for a plasma processing period for which a plasma for processing the substrate is generated, and applying different voltages to the plurality of electrodes to attract and hold the focus ring on the electrostatic chuck for a period other than the plasma processing period.Type: GrantFiled: September 22, 2020Date of Patent: December 6, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Yasuharu Sasaki, Taketoshi Tomioka, Hiroki Kishi, Jisoo Suh
-
Publication number: 20220302159Abstract: In one embodiment, a semiconductor device includes a stacked film alternately including a plurality of electrode layers and a plurality of insulating layers, a charge storage layer provided on a side face of the stacked film via a first insulator, and a semiconductor layer provided on a side face of the charge storage layer via a second insulator. The device further includes a third insulator provided between an electrode layer and an insulating layer in the stacked film and between the electrode layer and the first insulator, and a first film provided between the third insulator and the insulating layer and/or between the third insulator and the first insulator, and including carbon, germanium, tin, aluminum, phosphorus or arsenic.Type: ApplicationFiled: August 5, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Takanori YAMANAKA, Ryota FUJITSUKA, Hiroki KISHI
-
Patent number: 11309322Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate; a laminated body formed by laminating a plurality of electrode layers on the semiconductor substrate; a memory film provided in the laminated body and including a first block insulation film disposed in a direction perpendicular to the electrode layer, a charge storage film facing the first block insulation film, a tunnel insulation film facing the charge storage film, and a channel film facing the tunnel insulation film; and a barrier layer provided at at least one of interface between the plurality of electrode layers and the memory film and an interface in the memory film and mainly composed of carbon.Type: GrantFiled: September 12, 2019Date of Patent: April 19, 2022Assignee: KIOXIA CORPORATIONInventors: Ryota Fujitsuka, Kenta Yamada, Takanori Yamanaka, Takayuki Okada, Hirokazu Ishigaki, Hiroki Kishi, Nobushi Matsuura, Takashi Yamane, Ryota Suzuki
-
Publication number: 20210316416Abstract: A focus ring is disposed on a peripheral portion of a lower electrode that receives a substrate thereon in a process container so as to contact a member of the lower electrode. The focus ring includes a contact surface that contacts the member of the lower electrode and is made of any one of a silicon-containing material, alumina and quartz. At least one of the contact surface of the focus ring and a contact surface of the member of the lower electrode has surface roughness of 0.1 micrometers or more.Type: ApplicationFiled: June 25, 2021Publication date: October 14, 2021Inventors: Taketoshi TOMIOKA, Yasuharu SASAKI, Hiroki KISHI, Jisoo SUH
-
Patent number: 10975468Abstract: There is provided a cleaning method for removing a first deposit, formed on an upper electrode through an etching of a metal layer containing a metal, by using a plasma generated between a lower electrode of a lower structure and the upper electrode in a processing chamber of a plasma processing apparatus. The method includes a step of colliding ions with the first deposit formed on the upper electrode and a step of removing a second deposit, which is generated by said colliding and formed on the lower structure. Further, a cycle including the step of colliding and the step of removing is repeated multiple times.Type: GrantFiled: July 24, 2018Date of Patent: April 13, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroki Kishi, Mitsuru Hashimoto, Keiichi Shimoda, Eiichi Nishimura, Akitaka Shimizu
-
Publication number: 20210005495Abstract: An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a heat transfer medium to a space formed between the focus ring and the electrostatic chuck, and a plurality of electrodes provided at a region in the electrostatic chuck which corresponds to the focus ring. The electrostatic chucking method includes supplying by the supply unit the heat transfer medium to the space for a plasma processing period for which a plasma for processing the substrate is generated, and applying different voltages to the plurality of electrodes to attract and hold the focus ring on the electrostatic chuck for a period other than the plasma processing period.Type: ApplicationFiled: September 22, 2020Publication date: January 7, 2021Applicant: TOKYO ELECTRON LIMITEDInventors: Yasuharu SASAKI, Taketoshi TOMIOKA, Hiroki KISHI, Jisoo SUH
-
Patent number: 10825709Abstract: An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a heat transfer medium to a space formed between the focus ring and the electrostatic chuck, and a plurality of electrodes provided at a region in the electrostatic chuck which corresponds to the focus ring. The electrostatic chucking method includes supplying by the supply unit the heat transfer medium to the space for a plasma processing period for which a plasma for processing the substrate is generated, and applying different voltages to the plurality of electrodes to attract and hold the focus ring on the electrostatic chuck for a period other than the plasma processing period.Type: GrantFiled: March 22, 2019Date of Patent: November 3, 2020Assignee: TOKYO ELECTRON LIMITEDInventors: Yasuharu Sasaki, Taketoshi Tomioka, Hiroki Kishi, Jisoo Suh
-
Publication number: 20200303393Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate; a laminated body formed by laminating a plurality of electrode layers on the semiconductor substrate; a memory film provided in the laminated body and including a first block insulation film disposed in a direction perpendicular to the electrode layer, a charge storage film facing the first block insulation film, a tunnel insulation film facing the charge storage film, and a channel film facing the tunnel insulation film; and a barrier layer provided at at least one of interface between the plurality of electrode layers and the memory film and an interface in the memory film and mainly composed of carbon.Type: ApplicationFiled: September 12, 2019Publication date: September 24, 2020Applicant: Toshiba Memory CorporationInventors: Ryota Fujitsuka, Kenta Yamada, Takanori Yamanaka, Takayuki Okada, Hirokazu Ishigaki, Hiroki Kishi, Nobushi Matsuura, Takashi Yamane, Ryota Suzuki
-
Patent number: 10755902Abstract: A plasma processing apparatus includes a chamber, a mounting table 2 and a focus ring 8. The chamber is configured to process a semiconductor wafer W with plasma. The mounting table 2 is provided within the chamber, and includes a holding surface 9a on which the semiconductor wafer W is mounted. The focus ring 8 is provided to surround the semiconductor wafer W mounted on the holding surface 9a, and includes a first flat portion 8a, a second flat portion 8b and a third flat portion 8c which are formed in sequence from an inner circumferential side of the focus ring 8 toward an outer circumferential side thereof. Here, the first flat portion 8a is lower than the holding surface 9a, the second flat portion 8b is lower than the first flat portion 8a, and the third flat portion 8c is higher than the first flat portion 8a.Type: GrantFiled: May 25, 2016Date of Patent: August 25, 2020Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroki Kishi, Jisoo Suh
-
Publication number: 20190221464Abstract: An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a heat transfer medium to a space formed between the focus ring and the electrostatic chuck, and a plurality of electrodes provided at a region in the electrostatic chuck which corresponds to the focus ring. The electrostatic chucking method includes supplying by the supply unit the heat transfer medium to the space for a plasma processing period for which a plasma for processing the substrate is generated, and applying different voltages to the plurality of electrodes to attract and hold the focus ring on the electrostatic chuck for a period other than the plasma processing period.Type: ApplicationFiled: March 22, 2019Publication date: July 18, 2019Applicant: TOKYO ELECTRON LIMITEDInventors: Yasuharu SASAKI, Taketoshi TOMIOKA, Hiroki KISHI, Jisoo SUH
-
Patent number: 10269607Abstract: An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a heat transfer medium to a space formed between the focus ring and the electrostatic chuck, and a plurality of electrodes provided at a region in the electrostatic chuck which corresponds to the focus ring. The electrostatic chucking method includes supplying by the supply unit the heat transfer medium to the space for a plasma processing period for which a plasma for processing the substrate is generated, and applying different voltages to the plurality of electrodes to attract and hold the focus ring on the electrostatic chuck for a period other than the plasma processing period.Type: GrantFiled: December 18, 2015Date of Patent: April 23, 2019Assignee: TOKYO ELECTRON LIMITEDInventors: Yasuharu Sasaki, Taketoshi Tomioka, Hiroki Kishi, Jisoo Suh
-
Publication number: 20180327901Abstract: There is provided a cleaning method for removing a first deposit, formed on an upper electrode through an etching of a metal layer containing a metal, by using a plasma generated between a lower electrode of a lower structure and the upper electrode in a processing chamber of a plasma processing apparatus. The method includes a step of colliding ions with the first deposit formed on the upper electrode and a step of removing a second deposit, which is generated by said colliding and formed on the lower structure. Further, a cycle including the step of colliding and the step of removing is repeated multiple times.Type: ApplicationFiled: July 24, 2018Publication date: November 15, 2018Applicant: TOKYO ELECTRON LIMITEDInventors: Hiroki KISHI, Mitsuru HASHIMOTO, Keiichi SHIMODA, Eiichi NISHIMURA, Akitaka SHIMIZU
-
Patent number: 10103011Abstract: A plasma processing apparatus 1 includes a chamber 10, a mounting table 16, a focus ring 24a, a first electrode plate 36 and a second electrode plate 35. The focus ring 24a is provided around the mounting table 16 to surround a mounting surface of the mounting table 16. The first electrode plate 36 is provided above the mounting table 16. The second electrode plate 35 is provided around the first electrode plate 36 to surround the first electrode plate 36 and is insulated from the first electrode plate 36. The plasma processing apparatus 1, in a first process, performs a preset processing on a semiconductor wafer W mounted on the mounting surface with plasma generated within the chamber, and, in a second process, increases an absolute value of a negative DC voltage applied to the second electrode plate 35 depending on an elapsed time of the first process.Type: GrantFiled: December 14, 2016Date of Patent: October 16, 2018Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroki Kishi, Jisoo Suh
-
Patent number: 10053773Abstract: There is provided a cleaning method for removing a first deposit, formed on an upper electrode through an etching of a metal layer containing a metal, by using a plasma generated between a lower electrode of a lower structure and the upper electrode in a processing chamber of a plasma processing apparatus. The method includes a step of colliding ions with the first deposit formed on the upper electrode and a step of removing a second deposit, which is generated by said colliding and formed on the lower structure. Further, a cycle including the step of colliding and the step of removing is repeated multiple times.Type: GrantFiled: March 2, 2015Date of Patent: August 21, 2018Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroki Kishi, Mitsuru Hashimoto, Keiichi Shimoda, Eiichi Nishimura, Akitaka Shimizu
-
Publication number: 20170178872Abstract: A plasma processing apparatus 1 includes a chamber 10, a mounting table 16, a focus ring 24a, a first electrode plate 36 and a second electrode plate 35. The focus ring 24a is provided around the mounting table 16 to surround a mounting surface of the mounting table 16. The first electrode plate 36 is provided above the mounting table 16. The second electrode plate 35 is provided around the first electrode plate 36 to surround the first electrode plate 36 and is insulated from the first electrode plate 36. The plasma processing apparatus 1, in a first process, performs a preset processing on a semiconductor wafer W mounted on the mounting surface with plasma generated within the chamber, and, in a second process, increases an absolute value of a negative DC voltage applied to the second electrode plate 35 depending on an elapsed time of the first process.Type: ApplicationFiled: December 14, 2016Publication date: June 22, 2017Inventors: Hiroki KISHI, Jisoo SUH
-
Publication number: 20170066103Abstract: A focus ring is disposed on a peripheral portion of a lower electrode that receives a substrate thereon in a process container so as to contact a member of the lower electrode. The focus ring includes a contact surface that contacts the member of the lower electrode and is made of any one of a silicon-containing material, alumina and quartz. At least one of the contact surface of the focus ring and a contact surface of the member of the lower electrode has surface roughness of 0.1 micrometers or more.Type: ApplicationFiled: August 26, 2016Publication date: March 9, 2017Inventors: Taketoshi TOMIOKA, Yasuharu SASAKI, Hiroki KISHI, Jisoo SUH
-
Publication number: 20160351378Abstract: A plasma processing apparatus includes a chamber, a mounting table 2 and a focus ring 8. The chamber is configured to process a semiconductor wafer W with plasma. The mounting table 2 is provided within the chamber, and includes a holding surface 9a on which the semiconductor wafer W is mounted. The focus ring 8 is provided to surround the semiconductor wafer W mounted on the holding surface 9a, and includes a first flat portion 8a, a second flat portion 8b and a third flat portion 8c which are formed in sequence from an inner circumferential side of the focus ring 8 toward an outer circumferential side thereof. Here, the first flat portion 8a is lower than the holding surface 9a, the second flat portion 8b is lower than the first flat portion 8a, and the third flat portion 8c is higher than the first flat portion 8a.Type: ApplicationFiled: May 25, 2016Publication date: December 1, 2016Inventors: Hiroki Kishi, Jisoo Suh
-
Publication number: 20160189994Abstract: An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a heat transfer medium to a space formed between the focus ring and the electrostatic chuck, and a plurality of electrodes provided at a region in the electrostatic chuck which corresponds to the focus ring. The electrostatic chucking method includes supplying by the supply unit the heat transfer medium to the space for a plasma processing period for which a plasma for processing the substrate is generated, and applying different voltages to the plurality of electrodes to attract and hold the focus ring on the electrostatic chuck for a period other than the plasma processing period.Type: ApplicationFiled: December 18, 2015Publication date: June 30, 2016Applicant: TOKYO ELECTRON LIMITEDInventors: Yasuharu SASAKI, Taketoshi TOMIOKA, Hiroki KISHI, Jisoo SUH