Patents by Inventor Hiroki Nagahama
Hiroki Nagahama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240074495Abstract: A power supply unit for an aerosol generating device, includes a power supply, a heater connector connected to a heater configured to heat an aerosol source by consuming power supplied from the power supply, a case which constitutes a surface of the power supply unit, and a sensor which is disposed in the vicinity of the case and is configured to output a value related to a temperature of the case. Protection control for prohibiting one or both of charging of the power supply and discharging from the power supply to the heater is executed based on an output value of the sensor.Type: ApplicationFiled: November 5, 2023Publication date: March 7, 2024Applicant: Japan Tobacco Inc.Inventors: Manabu YAMADA, Tatsunari AOYAMA, Hiroshi KAWANAGO, Hiroki NAKAAE, Toru NAGAHAMA, Yuki NISHIMURA, Takashi FUJIKI, Yuki MASUDA, Ryo YOSHIDA
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Publication number: 20240071087Abstract: An information processing apparatus (10) includes a time and space information acquisition unit (110) that acquires high-risk time and space information indicating a spatial region with an increased possibility of an accident occurring or of a crime being committed and a corresponding time slot, a possible surveillance target acquisition unit (120) that identifies a video to be analyzed from among a plurality of videos generated by capturing an image of each of a plurality of places, on the basis of the high-risk time and space information, and analyzes the identified video to acquire information of a possible surveillance target, and a target time and space identification unit (130) that identifies at least one of a spatial region where surveillance is to be conducted which is at least a portion of the spatial region or a time slot when surveillance is to be conducted, from among the spatial region and the time slot indicated by the high-risk time and space information, on the basis of the information of theType: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: NEC CorporationInventors: Junko NAKAGAWA, Ryoma Oami, Kenichiro IDA, Mika Saito, Shohzoh Nagahama, Akinari Furukawa, Yasumasa Ohtsuka, Junichi Fukuda, Fumi Ikeda, Manabu Moriyama, Fumie Einaga, Tatsunori Yamagami, Keisuke Hirayama, Yoshitsugu Kumano, Hiroki Adachi
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Publication number: 20240071086Abstract: An information processing apparatus (10) includes a time and space information acquisition unit (110) that acquires high-risk time and space information indicating a spatial region with an increased possibility of an accident occurring or of a crime being committed and a corresponding time slot, a possible surveillance target acquisition unit (120) that identifies a video to be analyzed from among a plurality of videos generated by capturing an image of each of a plurality of places, on the basis of the high-risk time and space information, and analyzes the identified video to acquire information of a possible surveillance target, and a target time and space identification unit (130) that identifies at least one of a spatial region where surveillance is to be conducted which is at least a portion of the spatial region or a time slot when surveillance is to be conducted, from among the spatial region and the time slot indicated by the high-risk time and space information, on the basis of the information of theType: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: NEC CorporationInventors: Junko NAKAGAWA, Ryoma OAMI, Kenichiro IDA, Mika SAITO, Shohzoh NAGAHAMA, Akinari FURUKAWA, Yasumasa OHTSUKA, Junichi FUKUDA, Fumi IKEDA, Manabu MORIYAMA, Fumie EINAGA, Tatsunori YAMAGAMI, Keisuke ` HIRAYAMA, Yoshitsugu KUMANO, Hiroki ADACHI
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Publication number: 20230353887Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: July 12, 2023Publication date: November 2, 2023Applicant: Sony Group CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 11750937Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: May 17, 2022Date of Patent: September 5, 2023Assignee: Sony Group CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20220279154Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: May 17, 2022Publication date: September 1, 2022Applicant: Sony Group CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 11388380Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: March 16, 2021Date of Patent: July 12, 2022Assignee: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20210203902Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: March 16, 2021Publication date: July 1, 2021Applicant: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 10986323Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing, section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-convert d are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: May 29, 2020Date of Patent: April 20, 2021Assignee: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20200296342Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing, section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-convert d are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: May 29, 2020Publication date: September 17, 2020Applicant: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 10708563Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: April 23, 2019Date of Patent: July 7, 2020Assignee: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20190281268Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: April 23, 2019Publication date: September 12, 2019Applicant: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 10313648Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: December 27, 2017Date of Patent: June 4, 2019Assignee: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20180124369Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: December 27, 2017Publication date: May 3, 2018Applicant: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 9917748Abstract: There is provided an information processing apparatus, including an acquiring unit that acquires first information representing at least one of a characteristic and a status of delivery data and second information representing at least one of a characteristic and a status of a terminal in which the delivery data is usable, a comparing unit that compares the first information and the second information acquired by the acquiring unit, and determines whether or not the delivery data is usable in the terminal, and a presentation information generating unit that generates information of the delivery data usable in the terminal based on a determination result of the comparing unit as presentation information.Type: GrantFiled: April 22, 2013Date of Patent: March 13, 2018Assignee: Sony CorporationInventors: Yoriko Komatsuzaki, Hiroki Nagahama
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Patent number: 9866811Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: April 28, 2017Date of Patent: January 9, 2018Assignee: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20170230629Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: April 28, 2017Publication date: August 10, 2017Applicant: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Patent number: 9703361Abstract: There is provided a memory control apparatus including a deciding unit deciding, among a first main storage apparatus that is a main storage apparatus with low power consumption and a second main storage apparatus with power consumption higher than the power consumption of the first main storage apparatus as memory devices of multiple CPU cores, whether the second main storage apparatus is capable of being suspended, and a power managing unit suppressing a power supplied to the second main storage apparatus and at least one of the multiple CPU cores in a case where the deciding unit decides that the second main storage apparatus is capable of being suspended.Type: GrantFiled: March 11, 2013Date of Patent: July 11, 2017Assignee: SONY CORPORATIONInventors: Tomohiro Katori, Katsuya Takahashi, Hiroki Nagahama
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Patent number: 9661291Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: GrantFiled: January 20, 2016Date of Patent: May 23, 2017Assignee: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
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Publication number: 20170019650Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.Type: ApplicationFiled: September 15, 2016Publication date: January 19, 2017Applicant: Sony CorporationInventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda