Abstract: An imaging apparatus that is mounted on a vehicle that runs on a road surface includes: a light source that emits illumination light which is infrared light; a solid-state imaging device that images a subject and outputs an imaging signal indicating a light exposure amount; and a computator that computes subject information regarding the subject by using the imaging signal. The solid-state imaging device includes: first pixels that image the subject by receiving reflected light that is the illumination light reflected off the subject; and second pixels that image the subject by receiving visible light. Information indicated by an imaging signal outputted from the first pixels is information regarding a slope of the road surface, and information indicated by an imaging signal outputted from the second pixels is information regarding an appearance of the road surface.

Abstract: An imaging apparatus that is mounted on a vehicle that runs on a road surface includes: a light source that emits illumination light which is infrared light; a solid-state imaging device that images a subject and outputs an imaging signal indicating a light exposure amount; and a computator that computes subject information regarding the subject by using the imaging signal. The solid-state imaging device includes: first pixels that image the subject by receiving reflected light that is the illumination light reflected off the subject; and second pixels that image the subject by receiving visible light. Information indicated by an imaging signal outputted from the first pixels is information regarding a slope of the road surface, and information indicated by an imaging signal outputted from the second pixels is information regarding an appearance of the road surface.

Abstract: There is provided with a clock timing adjusting method for adjusting the difference of clock timings among a plurality of clock domains in a semiconductor integrated circuit which includes a clock generation portion capable of supplying a plurality of clocks with different phases, a plurality of clock domains for supplying clocks supplied from the clock generation portion to corresponding flip-flop groups, respectively, and a logic circuit portion having the flip-flop groups. In the clock timing adjusting method, a latency of each of the plurality of clock domains is extracted, then the phases of clocks supplied to the clock domains are determined among the plurality of clocks generated from the clock generation portion based on the extracted latencies, and the number of clock buffers is determined in order to adjust a latency difference of the plurality of clock domains which can not be adjusted by the determined clocks.

Abstract: A wireless communication apparatus capable of minimizing a danger involved in transmit power control based on control information containing errors and securing reliability of a system. In this apparatus, an overflow error detector and a reception state monitoring section acquire information on overflows of the analog to digital converter. Then, the reception quality decision section evaluates reliability of the received signal considering this overflow information and removes the signal with a reliability determined to be low from the basic data for generation of transmit power control information.

Abstract: A mobile communication system and communication line switching method in the mobile communication system capable of selecting the communication line, if there is a communication line with a better condition than the current communication line. If there is a communication-possible range with a better condition than a communication-possible range of a communication carrier that currently provides a communication line to mobile telephone 102, a communication carrier that provides a communication line to the communication-possible range is selected to enable communication under management of this communication carrier. By this means, it is possible to select a carrier or service area with a better condition than the currently used carrier or service area in terms of usage rate or service and achieve improvement of user convenience.

Abstract: The pilot signal reception method of the present invention irregularly receives pilot symbols. That is, the pilot signal reception method performs irregular reception processing such as randomizing reception timings or changing reception timings according to reception situations as appropriate to reduce influences of fading. Randomization of reception timings is implemented by generating random timings using a random timing generation circuit.

Abstract: A simulation apparatus of a semiconductor integrated circuit, capable of measuring power consumption in a higher abstract degree than an RT level and in a high speed, is realized, so that a low power consumption designing operation can be carried out by employing a simulation result. While a cycle base model of a designing subject circuit is arranged by a state control module model, a calculation module model, and a memory model, in the calculation module model, an algorithm description is made; a detailed structure such as a pipeline of hardware is shortcircuited to a calculation to be processed in a unit clock; and a timing shift is absorbed in a wait state of the state control module model, so that a high-speed simulation can be realized. Since such information as an area and a wiring capacitance is added to an activating ratio measurement of a simulation model, power consumption can be measured.

Abstract: A design technique considering a peak current is provided for high-level design of systems including LSIs. A hardware model representing the trade-off relationship between a leak current and performance is prepared in advance for functional units constituting the system. In the hardware model, the relationship between performance tpd and a source-drain leak current Pleak is described with a threshold voltage Vth as a parameter, for example. By referring to the trade-off relationship, design conditions for the functional units are determined under evaluation of the performance and power consumption of the entire system.

Abstract: A transmission power control apparatus for outputting a transmission data to be filtered by a band-limiting filter (9), includes: a branching unit (81) for branching transmission data before being entered into the band-limiting filter (9); a peak detecting filter (84) having the same structure as that of the band-limiting filter (9), for entering thereinto one of the transmission data branched by this branching unit (81); units (85 to 89) for calculating a correction value capable of suppressing a power peak of the transmission data by being filtered by this peak detecting filter (84); a delaying unit for delaying the other data of the branched transmission data by time required to calculate the correction value; and a correcting unit (83) for correcting the transmission data delayed by this delaying unit (82) based upon the correction value, and thereafter, for entering the corrected transmission data into the band-limiting filter (9).

Abstract: A limiting method is provided which limits signals having two components I channel and Q channel on two orthogonal coordinate axes within a predetermined range on the coordinate plane specified by the two coordinate axes, wherein the predetermined range is defined by concentric circles having the origin of the two coordinate axes as a center.

Abstract: A CDMA communication apparatus capable of minimizing a danger involved in transmit power control based on control information containing errors and securing reliability of a system. In this apparatus, the overflow error detector (103) and reception state monitoring section (104) acquire information on overflows of the AD converter (101). Then, the reception quality decision section (105) evaluates reliability of the received signal considering this overflow information and removes the signal whose reliability is decided to be low from the basic data for generation of TPC bits (transmit power control information).

Abstract: A transmission system is featured by that a correcting unit is arranged at a prestage of an ROF unit in the CDMA system. In this transmission system, an instantaneous power amount is calculated, and is compared with a preset upper limit value. When this calculated instantaneous power amount exceeds this upper limit value, this power amount is detected as an instantaneous peak. Only when the calculated instantaneous power amount exceeds the upper limit value, an amplitude correction is selectively carried out so as to reduce distortions appeared in the vicinity of a region to be corrected.

Abstract: A design technique considering a peak current is provided for high-level design of systems including LSIs. A hardware model representing the trade-off relationship between a leak current and performance is prepared in advance for functional units constituting the system. In the hardware model, the relationship between performance tpd and a source-drain leak current Pleak is described with a threshold voltage Vth as a parameter, for example. By referring to the trade-off relationship, design conditions for the functional units are determined under evaluation of the performance and power consumption of the entire system.

Abstract: An amplitude detecting circuit (1) includes a simple digital filter (2) having a structure corresponding to a part where the energy is concentrated in the full impulse response of a signal processing digital filter (3). Concretely, for example, the amplitude detecting circuit (1) (simple digital filter (2)) includes only four central taps having coefficients of large absolute values and considerably affecting on the output amplitude among sixteen taps of the signal processing digital filter (3). By the amplitude detecting circuit (1), the amplitude of an output signal of the signal processing digital filter (3) can approximately be detected.

Abstract: An apparatus for obtaining correlation by despreading a spread symbol with a spreading code is provided with a symbol storage section for storing symbol and a plurality of correlation calculators each of which executes a correlation calculation to obtain correlation by despreading the symbol data with a spreading code. The apparatus switches a spreading code to be provided to each of the plurality of correlation calculators individually so that each of the plurality of correlation calculators executes correlation calculation with a respective different spreading code and holds a same spreading code until correlation calculations of a plurality of symbols are finished.

Abstract: A transmission power control apparatus for outputting a transmission data to be filtered by a band-limiting filter (9), includes: a branching unit (81) for branching transmission data before being entered into the band-limiting filter (9); a peak detecting filter (84) having the same structure as that of the band-limiting filter (9), for entering thereinto one of the transmission data branched by this branching unit (81); units (85 to 89) for calculating a correction value capable of suppressing a power peak of the transmission data by being filtered by this peak detecting filter (84); a delaying unit for delaying the other data of the branched transmission data by time required to calculate the correction value; and a correcting unit (83) for correcting the transmission data delayed by this delaying unit (82) based upon the correction value, and thereafter, for entering the corrected transmission data into the band-limiting filter (9).

Abstract: An amplitude detecting circuit (1) comprises a simple digital filter (2) having a structure corresponding to a part where the energy is concentrated in the full impulse response of a signal processing digital filter (3). Concretely, for example, the amplitude detecting circuit (1) (simple digital filter (2)) comprises only four central taps having coefficients of large absolute values and considerably affecting on the output amplitude among sixteen taps of the signal processing digital filter (3). By the amplitude detecting circuit (1), the amplitude of an output signal of the signal processing digital filter (3) can approximately be detected.

Abstract: The pilot signal reception method of the present invention irregularly receives pilot symbols. That is, the pilot signal reception method performs irregular reception processing such as randomizing reception timings or changing reception timings according to reception situations as appropriate to reduce influences of fading. Randomization of reception timings is implemented by generating random timings using a random timing generation circuit.

Abstract: An address generator for compensating non-linear distortion of a transmitting amplifier according to this invention comprises transmission power calculation means for calculating transmission power based on transmission data, a comparator control circuit, and an address generation table. The address generation table comprises a plurality of comparators operating in parallel. The comparator control circuit turns on only necessary comparators based on the transmission power value so as to reduce power consumption.

Abstract: A digital filter according to the invention is an x-time interpolation (x is an interpolation ratio) type FIR filter. The digital filter is provided with a plurality of stages of delay elements into which serial data are inputted, and a plurality of data distributors which distribute the respective output data of the plurality of stages of delay elements into x different signal channels by a time-sharing system. The respective data distributors operate a rate higher by x times than the input rate of serial data and distribute data into x different channels by time-sharing. Preferably, by utilizing the symmetry of a digital filter coefficients, only the digital filter coefficients corresponding to the half taps at one side of the digital filter are prepared, wherein the respective output data of a pair of delay elements located at the symmetrical positions are inputted into one data distributor, and the respective data are distributed by a time-sharing system.