Patents by Inventor Hiroki Suto

Hiroki Suto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240022837
    Abstract: Provided is a solid-state imaging element capable of thinning out the number of operations of AD conversion units while suppressing an influence of a noise component on the AD conversion units of other columns.
    Type: Application
    Filed: November 9, 2021
    Publication date: January 18, 2024
    Inventor: HIROKI SUTO
  • Patent number: 11743449
    Abstract: An imaging device according to the present disclosure has a stacked chip structure in which at least two semiconductor chips, that are a first semiconductor chip provided with a pixel circuit and a second semiconductor chip including an analog-to-digital (AD) conversion circuit which is provided so as to correspond to the pixel circuit, are stacked. The AD conversion circuit includes a latch circuit that retains a digital code after AD conversion and a transfer circuit that transfers the digital code after AD conversion. Further, a failure detection circuit for detecting a failure of the AD conversion circuit is provided. The failure detection circuit performs failure detection by writing a test pattern for failure detection into the latch circuit via the transfer circuit, then reading the test pattern from the latch circuit via the transfer circuit, and comparing the read test pattern with an expected value.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: August 29, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hiroki Suto
  • Publication number: 20220094907
    Abstract: An imaging device according to the present disclosure has a stacked chip structure in which at least two semiconductor chips, that are a first semiconductor chip provided with a pixel circuit and a second semiconductor chip including an analog-to-digital (AD) conversion circuit which is provided so as to correspond to the pixel circuit, are stacked. The AD conversion circuit includes a latch circuit that retains a digital code after AD conversion and a transfer circuit that transfers the digital code after AD conversion. Further, a failure detection circuit for detecting a failure of the AD conversion circuit is provided. The failure detection circuit performs failure detection by writing a test pattern for failure detection into the latch circuit via the transfer circuit, then reading the test pattern from the latch circuit via the transfer circuit, and comparing the read test pattern with an expected value.
    Type: Application
    Filed: December 18, 2019
    Publication date: March 24, 2022
    Inventor: HIROKI SUTO
  • Patent number: 11021461
    Abstract: An artificial catalyst system which can acylate chromosome proteins with high selectivity has successfully been established by using a combination of an acyl CoA activating catalyst having target acylation area binding ability and acyl CoA or a derivative thereof.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: June 1, 2021
    Assignee: THE UNIVERSITY OF TOKYO
    Inventors: Motomu Kanai, Shigehiro Kawashima, Kenzo Yamatsugu, Yoshifumi Amamoto, Yuki Aoi, Hiroki Suto, Nozomu Nagashima, Hitoshi Kurumizaka, Akihisa Osakabe, Yasuhiro Arimura
  • Patent number: 10848700
    Abstract: An imaging device includes a plurality of pixels arranged in rows and columns. The plurality of pixels include a first pixel and a second pixel. A first signal line is coupled to the first pixel. A second signal line is coupled to the second pixel. The imaging device includes first comparator and a second comparator displaced from the first comparator in a column direction. The imaging device includes a switch circuit configured to couple the first signal line to the first comparator and the second comparator, and couple the second signal line to the first comparator and the second comparator.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: November 24, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hiroki Suto
  • Publication number: 20200186739
    Abstract: An imaging device includes a plurality of pixels arranged in rows and columns. The plurality of pixels include a first pixel and a second pixel. A first signal line is coupled to the first pixel. A second signal line is coupled to the second pixel. The imaging device includes first comparator and a second comparator displaced from the first comparator in a column direction. The imaging device includes a switch circuit configured to couple the first signal line to the first comparator and the second comparator, and couple the second signal line to the first comparator and the second comparator.
    Type: Application
    Filed: October 25, 2017
    Publication date: June 11, 2020
    Applicant: Sony Semiconductor Solutions Corporation
    Inventor: Hiroki Suto
  • Publication number: 20190047985
    Abstract: An artificial catalyst system which can acylate chromosome proteins with high selectivity has successfully been established by using a combination of an acyl CoA activating catalyst having target acylation area binding ability and acyl CoA or a derivative thereof.
    Type: Application
    Filed: August 29, 2016
    Publication date: February 14, 2019
    Applicant: THE UNIVERSITY OF TOKYO
    Inventors: Motomu KANAI, Shigehiro KAWASHIMA, Kenzo YAMATSUGU, Yoshifumi AMAMOTO, Yuki AOI, Hiroki SUTO, Nozomu NAGASHIMA, Hitoshi KURUMIZAKA, Akihisa OSAKABE, Yasuhiro ARIMURA
  • Patent number: 7622687
    Abstract: A turn signal switch device capable of setting angles (release angles) in case a first lever member deviates from an outer peripheral face of a canceling projection and advances into a rotational locus at the time of right-turn operation and left-turn operation to the same angle is provided. A bent portion that is bent toward a rotational locus of a canceling projection is formed on the side of a free end of a first arm portion that protrudes linearly from a winding portion of a torsion coil spring, and when a distal end of a first lever member is dragged by the rotation of the canceling projection, and rotates in a direction away from the winding portion of the torsion coil spring, a resilient force is given to the first lever member from the bent portion of the first arm portion and a distal end on the side of the free end.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: November 24, 2009
    Assignee: Alps Electric Co., Ltd.
    Inventors: Naoki Sugino, Hiroki Suto
  • Publication number: 20080202900
    Abstract: A turn signal switch device capable of setting angles (release angles) in case a first lever member deviates from an outer peripheral face of a canceling projection and advances into a rotational locus at the time of right-turn operation and left-turn operation to the same angle is provided. A bent portion that is bent toward a rotational locus of a canceling projection is formed on the side of a free end of a first arm portion that protrudes linearly from a winding portion of a torsion coil spring, and when a distal end of a first lever member is dragged by the rotation of the canceling projection, and rotates in a direction away from the winding portion of the torsion coil spring, a resilient force is given to the first lever member from the bent portion of the first arm portion and a distal end on the side of the free end.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 28, 2008
    Inventors: Naoki Sugino, Hiroki Suto
  • Patent number: 7402768
    Abstract: A thin film magnetic head includes a recording and playback element, a lead conductor layer for feeding a power to the recording and playback element, an electrically conductive bump for conductively connecting the lead conductor layer to an electrode pad for external connection, and an insulating protective layer filling between the recording and playback element and the electrically conductive bump. A thermal deformation-preventing layer composed of a material having a thermal expansion coefficient smaller than that of the insulating protective layer is disposed in the insulating protective layer in such a way as to locate between a medium-facing surface and the electrically conductive bump without being exposed at the medium-facing surface. In the resulting thin film magnetic head, protrusion of the recording and playback element toward the recording medium side can be prevented without changing the configuration of the recording and playback element nor the forming material.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: July 22, 2008
    Assignee: Alps Electric Co., Ltd
    Inventors: Naoki Sugino, Hiroki Suto
  • Publication number: 20080060923
    Abstract: A thin film magnetic head includes a recording and playback element, a lead conductor layer for feeding a power to the recording and playback element, an electrically conductive bump for conductively connecting the lead conductor layer to an electrode pad for external connection, and an insulating protective layer filling between the recording and playback element and the electrically conductive bump. A thermal deformation-preventing layer composed of a material having a thermal expansion coefficient smaller than that of the insulating protective layer is disposed in the insulating protective layer in such a way as to locate between a medium-facing surface and the electrically conductive bump without being exposed at the medium-facing surface. In the resulting thin film magnetic head, protrusion of the recording and playback element toward the recording medium side can be prevented without changing the configuration of the recording and playback element nor the forming material.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 13, 2008
    Inventors: Naoki Sugino, Hiroki Suto
  • Patent number: 7254711
    Abstract: A certificate authority for certifying the validity of the collation result from a user terminal is placed on a communication network. The user terminal identifies a user himself or herself by collation by using biometrical information of the user. In response to notification of the collation result from the user terminal across the communication network, a service providing apparatus requests across the communication network the certificate authority to certify the validity of the collation result. When a certificate which certifies the validity of the collation result is notified from the certificate authority across the communication network, the service providing apparatus provides a predetermined service to the user.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: August 7, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Satoshi Shigematsu, Mamoru Nakanishi, Hiroki Suto
  • Patent number: 6990219
    Abstract: An image capturing apparatus includes an image capturing section and capture control section. The image capturing section converts the shape of an object into an electrical quantity in accordance with the parameter value set in a parameter setting section, and outputs image data representing an image corresponding to the shape of the object. The capture control section receives the image data output from the image capturing section, calculates an evaluation index for evaluating the image quality of the image from the image data. If the evaluation index falls outside the range of a preset reference value, the capture control section changes the parameter value set in the parameter setting section so as to make the evaluation index fall within the range of the reference value to output the image data which is received from the image capturing section and the evaluation index of which falls within the range of the reference value.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: January 24, 2006
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Morimura, Toshishige Shimamura, Kenichi Saito, Yukio Okazaki, Hakaru Kyuragi, Chikara Yamaguchi, Hiroki Suto, Satoshi Shigematsu
  • Patent number: 6934884
    Abstract: In order to provide a built-in self testing function, a one-chip microcomputer is equipped with an activation register for activating the test operation and a built-in self test activation pattern generator for setting initial values at test control circuits (pseudo random number generator, logical circuit testing compressor, pattern generator, and memory testing compressor). In accordance with an instruction from the CPU, a built-in self test is activated so that the results of tests of the memory and the group of logical circuits are read from the memory testing compressor and the logical circuit testing compressor, and respectively compared with expected values preliminarily stored in the memory in the one-chip microcomputer; thus, the results are diagnosed. Thus, it is possible to carry out a built-in self test without using a plurality of exclusively-used test terminals.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: August 23, 2005
    Assignees: Sharp Kabushiki Kaisha, Nippon Telegraph and Telephone Corporation
    Inventors: Masaki Wakabayashi, Kazuhiro Yaegawa, Masaaki Tanno, Hiroki Suto, Tadao Takeda
  • Patent number: 6598137
    Abstract: A 1-chip microcomputer having a built-in nonvolatile memory includes at least one erasable flash memory provided in a memory space of the microcomputer, a boot ROM for storing an initial program to start up the 1-chip microcomputer and a transfer program to transfer the initial program to the flash memory, and control means for, when the flash memory stores no program, transferring the initial program to the flash memory in accordance with the transfer program and subsequently removing the boot ROM from the memory space. Consequently, even if a new program is additionally stored to the nonvolatile memory in the 1-chip microcomputer, the additional program can be carried out.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: July 22, 2003
    Assignees: Sharp Kabushiki Kaisha, Nippon Telegraph and Telephone Corporation
    Inventors: Kazuhiro Yaegawa, Ryuichi Ogawa, Tadao Takeda, Hiroki Suto, Masaaki Tanno
  • Publication number: 20030048173
    Abstract: An authentication method includes the first, second, and third steps. In the first step, a biometrical information sensor reads the biometrical information of a user. In the second step, the read biometrical information is collated with registered biometrical information in a registration memory. When the collation result represents that collation has successfully been done, user unique information from an authentication information output section is converted into an emulator signal corresponding to a service provided by a use device. The emulator signal is transmitted to the use device. In the third step, the use device provides the service to the user on the basis of the received emulator signal. An authentication system and authentication token are also disclosed.
    Type: Application
    Filed: September 5, 2002
    Publication date: March 13, 2003
    Inventors: Satoshi Shigematsu, Takahiro Hatano, Hiroki Suto, Yukio Okazaki, Hakaru Kyuragi
  • Publication number: 20020152375
    Abstract: A certificate authority for certifying the validity of the collation result from a user terminal is placed on a communication network. The user terminal identifies a user himself or herself by collation by using biometrical information of the user. In response to notification of the collation result from the user terminal across the communication network, a service providing apparatus requests across the communication network the certificate authority to certify the validity of the collation result.
    Type: Application
    Filed: April 4, 2002
    Publication date: October 17, 2002
    Inventors: Satoshi Shigematsu, Mamoru Nakanishi, Hiroki Suto
  • Publication number: 20020146156
    Abstract: An image capturing apparatus includes an image capturing section and capture control section. The image capturing section converts the shape of an object into an electrical quantity in accordance with the parameter value set in a parameter setting section, and outputs image data representing an image corresponding to the shape of the object. The capture control section receives the image data output from the image capturing section, calculates an evaluation index for evaluating the image quality of the image from the image data. If the evaluation index falls outside the range of a preset reference value, the capture control section changes the parameter value set in the parameter setting section so as to make the evaluation index fall within the range of the reference value to output the image data which is received from the image capturing section and the evaluation index of which falls within the range of the reference value.
    Type: Application
    Filed: December 12, 2001
    Publication date: October 10, 2002
    Inventors: Hiroki Morimura, Toshishige Shimamura, Kenichi Saito, Yukio Okazaki, Hakaru Kyuragi, Chikara Yamaguchi, Hiroki Suto, Satoshi Shigematsu
  • Publication number: 20020095588
    Abstract: An authentication token includes a personal collation unit and communication unit. The personal collation unit includes a sensor, storage unit, and collation unit. The sensor detects biometrical information of a user and outputs the detection result as sensing data. The storage unit stores in advance registered data to be collated with the biometrical information of the user. The collation unit collates the registered data with the sensing data and outputs the collation result as authentication data. The communication unit transmits the authentication data from the personal collation unit to the use device as communication data. The personal collation unit and communication unit are integrated.
    Type: Application
    Filed: May 11, 2001
    Publication date: July 18, 2002
    Inventors: Satoshi Shigematsu, Kenichi Saito, Katsuyuki Machida, Takahiro Hatano, Hakaru Kyuragi, Hideyuki Unno, Hiroki Suto, Mamoru Nakanishi, Koji Fujii, Hiroki Morimura, Toshishige Shimamura, Takuya Adachi, Namiko Ikeda