Patents by Inventor Hirokuni Fujiyama
Hirokuni Fujiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9236857Abstract: A voltage detection circuit includes a reference voltage and current supply configured to generate a reference voltage and a reference current; a switching element configured to shift from an off-state to an on-state when the reference voltage is higher than a predetermined threshold voltage; a current mirror circuit allowing a current corresponding to the reference current to flow through the switching element in the on-state; a capacitive element coupled in series to the current mirror circuit and charged with the current flowing through the switching element; and an inverter configured to output an enable signal activated based on a terminal voltage of the capacitive element.Type: GrantFiled: July 15, 2014Date of Patent: January 12, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Shinji Miyamoto, Ichiro Yamane, Hirokuni Fujiyama
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Publication number: 20140327476Abstract: A voltage detection circuit includes a reference voltage and current supply configured to generate a reference voltage and a reference current; a switching element configured to shift from an off-state to an on-state when the reference voltage is higher than a predetermined threshold voltage; a current mirror circuit allowing a current corresponding to the reference current to flow through the switching element in the on-state; a capacitive element coupled in series to the current mirror circuit and charged with the current flowing through the switching element; and an inverter configured to output an enable signal activated based on a terminal voltage of the capacitive element.Type: ApplicationFiled: July 15, 2014Publication date: November 6, 2014Inventors: Shinji MIYAMOTO, Ichiro YAMANE, Hirokuni FUJIYAMA
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Publication number: 20120262146Abstract: In a reference-voltage generation circuit using a diode, its temperature characteristics can be freely controlled. A regulating current supply section supplies a regulating current for regulating a diode current to an anode of one of a first or second diode. The regulating current supply section can change a magnitude of the regulating current, and can generate a current proportionate to a diode current of the other diode as the regulating current.Type: ApplicationFiled: February 3, 2012Publication date: October 18, 2012Applicant: PANASONIC CORPORATIONInventors: Ayako MORITA, Kaori NISHIKAWA, Hirokuni FUJIYAMA
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Patent number: 8093881Abstract: A first resistance element is coupled between a first rectifying element and an output node at which a reference voltage is generated. Second and third resistance elements are coupled in series between a second rectifying element and the output node. A differential amplifier outputs a control voltage corresponding to a difference between a first voltage generated at a connection point of the first rectifying element and the first resistance element and a second voltage generated at a connection point of the second resistance element and the third resistance element. A control circuit supplies a control current corresponding to the control voltage from the differential amplifier. A start-up circuit causes, by supplying a start-up current to the output node in response to supply of a power supply voltage, transition from a first stable state to a second stable state.Type: GrantFiled: March 4, 2011Date of Patent: January 10, 2012Assignee: Panasonic CorporationInventor: Hirokuni Fujiyama
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Publication number: 20110156690Abstract: A first resistance element is coupled between a first rectifying element and an output node at which a reference voltage is generated. Second and third resistance elements are coupled in series between a second rectifying element and the output node. A differential amplifier outputs a control voltage corresponding to a difference between a first voltage generated at a connection point of the first rectifying element and the first resistance element and a second voltage generated at a connection point of the second resistance element and the third resistance element. A control circuit supplies a control current corresponding to the control voltage from the differential amplifier. A start-up circuit causes, by supplying a start-up current to the output node in response to supply of a power supply voltage, transition from a first stable state to a second stable state.Type: ApplicationFiled: March 4, 2011Publication date: June 30, 2011Applicant: Panasonic CorporationInventor: Hirokuni FUJIYAMA
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Patent number: 7688059Abstract: There is provided a filter characteristic adjusting apparatus and a filter characteristic adjusting method which can avoid an increase in circuit scale of the filter characteristic adjusting apparatus, and can speedily adjust a characteristic frequency of the filter to a desired frequency. When performing characteristic adjustment for the filter, the test signal generation unit (31) generates a test signal (s14) which is a pulse signal having the same frequency as the characteristic frequency of the filter (10) on the basis of a reference signal (s17), and a phase-shifted test signal (s14?) that is obtained by shifting the phase of the test signal (s14) by a predetermined amount with a phase shift unit (32) in a control signal generation unit (33) is compared with a filter output signal (s16) that is obtained by inputting the test signal (s14) into the filter (10) to obtain a phase difference between the signals, and then the phase difference is subjected to a binary search to generate a control signal (s11).Type: GrantFiled: November 29, 2005Date of Patent: March 30, 2010Assignee: Panasonic CorporationInventors: Hirokuni Fujiyama, Takashi Morie, Hiroya Ueno
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Patent number: 7587010Abstract: A pseudo-image signal producing section produces a pseudo-image signal imitating an actual image signal. An amplitude detection section detects the amplitude of the pseudo-image signal having passed through a complex filter circuit. A filter control section controls an element value control section in the complex filter circuit so as to decrease the detected amplitude. The element value control section performs an element value adjustment so that absolute element values of a pair of elements corresponding to each other in two filter circuits in the complex filter circuit increase/decrease in opposite directions.Type: GrantFiled: October 12, 2005Date of Patent: September 8, 2009Assignee: Panasonic CorporationInventors: Takashi Morie, Hiroya Ueno, Hirokuni Fujiyama, Joji Hayashi, Akinori Matsumoto, Katsumasa Hijikata
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Patent number: 7523154Abstract: A write compensation circuit of a recording device includes a first delay portion driven by a first driving voltage, for receiving a clock signal, delaying the clock signal by a first delay time, and outputting the delayed clock signal, and a voltage supplying portion for supplying the first driving voltage to the first delay portion in such a manner that the first delay time is substantially equal to a clock period of the clock signal.Type: GrantFiled: August 8, 2005Date of Patent: April 21, 2009Assignee: Panasonic CorporationInventors: Hirokuni Fujiyama, Shiro Dosho, Hiroyuki Nakahira, Akira Yamamoto, Hiroki Mouri
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Patent number: 7477099Abstract: In a filter adjustment circuit for an analog filter circuit such as a Gm-C filter, an input signal IS from a reference signal generation circuit 1 is inputted to a Gm-C filter 2 to be filtered and then converted by a conversion circuit 3 to a digital signal. A reference signal RS from the reference signal generation circuit 1 is converted by a conversion circuit 4 to a digital signal. The two converted signals are held in time series in a holding circuit 5. A timing generation circuit 6 generates an update timing signal en based on a reference time-series signal ref from the holding circuit 5. A control signal generation circuit 7 generates a control signal CS based on the reference time-series signal ref and a filter output time-series signal tgt, each from the holding circuit 5. The control signal CS is inputted to the Gm-C filter 2 in response to the update timing signal en to adjust the gain of the Gm-C filter 2.Type: GrantFiled: September 2, 2005Date of Patent: January 13, 2009Assignee: Panasonic CorporationInventors: Kouji Okamoto, Takashi Morie, Shiro Dosho, Hirokuni Fujiyama
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Publication number: 20080218255Abstract: There is provided a filter characteristic adjusting apparatus and a filter characteristic adjusting method which can avoid an increase in circuit scale of the filter characteristic adjusting apparatus, and can speedily adjust a characteristic frequency of the filter to a desired frequency. When performing characteristic adjustment for the filter, the test signal generation unit (31) generates a test signal (s14) which is a pulse signal having the same frequency as the characteristic frequency of the filter (10) on the basis of a reference signal (s17), and a phase-shifted test signal (s14?) that is obtained by shifting the phase of the test signal (s14) by a predetermined amount with a phase shift unit (32) in a control signal generation unit (33) is compared with a filter output signal (s16) that is obtained by inputting the test signal (s14) into the filter (10) to obtain a phase difference between the signals, and then the phase difference is subjected to a binary search to generate a control signal (s11).Type: ApplicationFiled: November 29, 2005Publication date: September 11, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hirokuni Fujiyama, Takashi Morie, Hiroya Ueno
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Publication number: 20080169948Abstract: In a filter adjustment circuit for an analog filter circuit such as a Gm-C filter, an input signal IS from a reference signal generation circuit 1 is inputted to a Gm-C filter 2 to be filtered and then converted by a conversion circuit 3 to a digital signal. A reference signal RS from the reference signal generation circuit 1 is converted by a conversion circuit 4 to a digital signal. The two converted signals are held in time series in a holding circuit 5. A timing generation circuit 6 generates an update timing signal en based on a reference time-series signal ref from the holding circuit 5. A control signal generation circuit 7 generates a control signal CS based on the reference time-series signal ref and a filter output time-series signal tgt, each from the holding circuit 5. The control signal CS is inputted to the Gm-C filter 2 in response to the update timing signal en to adjust the gain of the Gm-C filter 2.Type: ApplicationFiled: September 2, 2005Publication date: July 17, 2008Inventors: Kouji Okamoto, Takashi Morie, Shiro Dosho, Hirokuni Fujiyama
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Publication number: 20060088136Abstract: A pseudo-image signal producing section produces a pseudo-image signal imitating an actual image signal. An amplitude detection section detects the amplitude of the pseudo-image signal having passed through a complex filter circuit. A filter control section controls an element value control section in the complex filter circuit so as to decrease the detected amplitude. The element value control section performs an element value adjustment so that absolute element values of a pair of elements corresponding to each other in two filter circuits in the complex filter circuit increase/decrease in opposite directions.Type: ApplicationFiled: October 12, 2005Publication date: April 27, 2006Inventors: Takashi Morie, Hiroya Ueno, Hirokuni Fujiyama, Joji Hayashi, Akinori Matsumoto, Katsumasa Hijikata
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Patent number: 6970313Abstract: A write compensation circuit of a recording device includes a first delay portion driven by a first driving voltage, for receiving a clock signal, delaying the clock signal by a first delay time, and outputting the delayed clock signal, and a voltage supplying portion for supplying the first driving voltage to the first delay portion in such a manner that the first delay time is substantially equal to a clock period of the clock signal.Type: GrantFiled: March 30, 2000Date of Patent: November 29, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hirokuni Fujiyama, Shiro Dosho, Hiroyuki Nakahira, Akira Yamamoto, Hiroki Mouri
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Patent number: 6882207Abstract: In an offset control circuit, a voltage/current converting portion generates differential current (I+ and I?) that are proportional to a potential difference between differential input voltage signals (VIN+ and VIN?), and an offset adjusting current-generating portion generates offset adjusting currents (Iofs+ and Iofs?). In a current/voltage converting portion, a current (Ir) that is proportional to a potential difference between differential terminals flows through. Differential current output terminals, offset adjusting current-output terminals and the differential terminals are connected. The offset components contained in the differential input voltage signals (VIN+ and VIN?) are adjusted with the offset adjusting currents (Iofs+ and Iofs?), and differential output voltage signals (VO+ and VO?) in which the offset components are added to the differential input voltage signals (VIN+ and VIN?) are generated.Type: GrantFiled: June 25, 2003Date of Patent: April 19, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hirokuni Fujiyama, Takashi Morie
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Patent number: 6784654Abstract: In a signal reproduction block of a DVD reproduction apparatus, an output signal line for outputting a characteristic information signal representing a characteristic of a filter incorporated in the signal reproduction block to the outside is additionally provided on the output side of an A/D converter. In this way, it is possible to prevent an analog data signal from deteriorating during a data signal reproduction process due to a parasitic effect of the output signal line. Moreover, the filter characteristic information signal is output through the output signal line after it is convened to a digital signal by the A/D convener, thereby avoiding the deterioration the characteristic information signal and thus improving the measurement precision.Type: GrantFiled: September 16, 2002Date of Patent: August 31, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hirokuni Fujiyama, Takashi Morie
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Patent number: 6745218Abstract: An adaptive digital filter of the present invention includes: a pipelined filtering section for performing a filtering operation based on input data and coefficient data so as to output filtered data; and a non-pipelined adaptation section for outputting the coefficient data to the pipelined filtering section by performing a coefficient adaptation operation in a non-pipelined process based on the input data and the filtered data so that the filtered data output from the pipelined filtering section converges to a predetermined reference value.Type: GrantFiled: March 16, 2000Date of Patent: June 1, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akira Yamamoto, Hiroyuki Nakahira, Hirokuni Fujiyama, Hiroki Mouri
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Patent number: 6714075Abstract: The variable gain amplifier of the invention includes an input node pair, a first output node pair, a voltage-current converter, a plurality of first resistances, a first current source, a second current source, a second output node pair, a third output node pair and a switch circuit. A differential signal supplied to the input node pair is amplified with a predetermined gain (first gain) and output from the second output node pair. The differential signal is also amplified with a gain (second gain) corresponding to the resistance value between one interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to the third output node pair via the switch circuit, and output from the third output node pair. The second gain can be changed by changing the two interconnection nodes connected to the third output node pair via the switch circuit.Type: GrantFiled: November 4, 2002Date of Patent: March 30, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takashi Morie, Hirokuni Fujiyama
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Publication number: 20040004507Abstract: In an offset control circuit, a voltage/current converting portion generates differential current (I+ and I−) that are proportional to a potential difference between differential input voltage signals (VIN+ and VIN−), and an offset adjusting current-generating portion generates offset adjusting currents (Iofs+ and Iofs−). In a current/voltage converting portion, a current (Ir) that is proportional to a potential difference between differential terminals flows through. Differential current output terminals, offset adjusting current-output terminals and the differential terminals are connected. The offset components contained in the differential input voltage signals (VIN+ and VIN−) are adjusted with the offset adjusting currents (Iofs+ and Iofs−), and differential output voltage signals (VO+ and VO−) in which the offset components are added to the differential input voltage signals (VIN+ and VIN−) are generated.Type: ApplicationFiled: June 25, 2003Publication date: January 8, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Hirokuni Fujiyama, Takashi Morie
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Publication number: 20030095005Abstract: The variable gain amplifier of the invention includes an input node pair, a first output node pair, a voltage-current converter, a plurality of first resistances, a first current source, a second current source, a second output node pair, a third output node pair and a switch circuit. A differential signal supplied to the input node pair is amplified with a predetermined gain (first gain) and output from the second output node pair. The differential signal is also amplified with a gain (second gain) corresponding to the resistance value between one interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to the third output node pair via the switch circuit, and output from the third output node pair. The second gain can be changed by changing the two interconnection nodes connected to the third output node pair via the switch circuit.Type: ApplicationFiled: November 4, 2002Publication date: May 22, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Takashi Morie, Hirokuni Fujiyama
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Publication number: 20030052698Abstract: In a signal reproduction block of a DVD reproduction apparatus, an output signal line for outputting a characteristic information signal representing a characteristic of a filter incorporated in the signal reproduction block to the outside is additionally provided on the output side of an A/D converter. In this way, it is possible to prevent an analog data signal from deteriorating during a data signal reproduction process due to a parasitic effect of the output signal line. Moreover, the filter characteristic information signal is output through the output signal line after it is converted to a digital signal by the A/D converter, thereby avoiding the deterioration the characteristic information signal and thus improving the measurement precision.Type: ApplicationFiled: September 16, 2002Publication date: March 20, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Hirokuni Fujiyama, Takashi Morie