Patents by Inventor Hirokuni Nakatani

Hirokuni Nakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4291337
    Abstract: In an electric charge transfer apparatus, first capacitance elements have the one end grounded and the other end connected to a first main electrode of a field effect transistor. Second capacitance elements have the one end grounded and the other end connected to a second main electrode of the field effect transistor. Third capacitance elements have the one end connected to the second main electrode of the field effect transistor and the other end connected to a transfer auxiliary pulse application terminal. Switch element have the one end connected to the second main electrode of the field effect transistor and the other end connected to a voltage source. A transfer pulse application terminal is connected to a control electrode of the field effect transistor.
    Type: Grant
    Filed: September 20, 1979
    Date of Patent: September 22, 1981
    Assignee: Matsushita Electronics Corporation
    Inventors: Tooru Takamura, Sumio Terakawa, Hirokuni Nakatani, Izumi Murozono
  • Patent number: 4189749
    Abstract: A solid state image sensing device comprising a matrix-disposed photoelectric diodes 27+21, 27+21, . . . . on a monolithic substrate, wherein each one transferring switching means 24, . . . . and each one noise eliminating MOS switch 26, . . . . are provided for each vertical column of said matrix-disposed photoelectric transducing element, and the transferring switches 24, . . . . twice transfers information on a connecting line 22 of each column to a node point N.sub.ST during each horizontal fly-back period, so that the first one of said twice transferring transfers noise signal to the node points N.sub.ST for throwing it away, and the second one of said transferring transfers genuine light information of the photodiode 27, . . . to the node points N.sub.ST, . . . . for outputting the light information, whereby noises such as spurious noise, fixed pattern noise and blooming are eliminated and also scanning speed is improved.
    Type: Grant
    Filed: September 13, 1978
    Date of Patent: February 19, 1980
    Assignee: Matsushita Electronics Corporation
    Inventors: Yoshimitsu Hiroshima, Tooru Takamura, Hirokuni Nakatani, Izumi Murozono
  • Patent number: 4067046
    Abstract: Solid state imaging device wherein a plurality of picture elements each comprising a MOSFET and a photodiode connected to a source electrode of the MOSFET are arranged in rows and columns. The gate electrodes of the MOSFET in each row are connected in common, the drain electrodes in odd numbered rows and the drain electrodes in even numbered rows are connected in common, respectively within each column and connected to source electrodes of first and second switching MOSFET, respectively, arranged for each column. Drawn electrodes of the first switching MOSFET and drain electrodes of the second switching MOSFET are connected to first and second output lines, respectively, which are connected to input terminals of a differential amplifier. Photo spurious signals sensed at the drain regions of the MOSFET of the picture elements and noise spikes caused by gatedrain capacitances of the switching MOSFET are eliminated, amd the scanning speed is increased.
    Type: Grant
    Filed: March 1, 1976
    Date of Patent: January 3, 1978
    Assignee: Matsushita Electronics Corporation
    Inventors: Hirokuni Nakatani, Toru Takamura, Yoshimitsu Hiroshima, Susumu Hashimoto
  • Patent number: 4045817
    Abstract: A semiconductor optical image sensing device having a signal line connected to the drain electrodes of MOS field effect transistors each corresponding to a picture element, wherein the source electrodes of the MOS field effect transistors are connected to photo-diodes, capacitors of MOS structures are connected between the gate electrodes of the MOS field effect transistors and a noise line, and the signal line and the noise line are connected to input terminals of a differential amplifier. The capacitors of MOS structures are formed in the same way as the gates and drains of the MOS field effect transistors. By applying a scanning pulse to the gate electrodes of the MOS field effect transistors to scan the MOS field effect transistors for switching the same, a signal output and a noise output are produced from the signal line while another noise output is produced from the noise line. The signal to noise ratio can be enhanced by producing only the signal output from the differential amplifier.
    Type: Grant
    Filed: February 12, 1976
    Date of Patent: August 30, 1977
    Assignee: Matsushita Electronics Corporation
    Inventors: Hirokuni Nakatani, Toru Takamura, Susumu Hashimoto