Patents by Inventor Hiromasa Kato
Hiromasa Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10160690Abstract: The present invention provides a silicon nitride circuit board in which metal plates are attached on front and rear sides of a silicon nitride substrate having a three-point bending strength of 500 MPa or higher, with attachment layers interposed therebetween, wherein assuming that a thickness of the metal plate on the front side is denoted by t1, and a thickness of the metal plate on the rear side is denoted by t2, at least one of the thicknesses t1 and t2 is 0.6 mm or larger, a numerical relation: 0.10?|t1?t2|?0.30 mm is satisfied, and warp amounts of the silicon nitride substrate in a long-side direction and a short-side direction both fall within a range from 0.01 to 1.0 mm. Due to above configuration, TCT properties of the silicon nitride circuit board can be improved even if the thicknesses of the front and rear metal plates are large.Type: GrantFiled: July 27, 2016Date of Patent: December 25, 2018Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Hiromasa Kato, Noboru Kitamori
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Patent number: 10109555Abstract: The present invention provides a silicon nitride circuit board in which metal plates are attached on front and rear sides of a silicon nitride substrate having a three-point flexural strength of 500 MPa or higher, wherein assuming that a thickness of the metal plate on the front side is denoted by t1, and a thickness of the metal plate on the rear side is denoted by t2, a numerical relation: |t1?t2|?0.30 mm is satisfied, and a warp is formed in the silicon nitride substrate so that the silicon nitride substrate is convex toward the metal plate on one of the front side or the rear side; and warp amounts of the silicon nitride substrate in a long-side direction and a short-side direction both fall within a range from 0.01 to 1.0 mm. It is preferable that a longitudinal width (L1) of the silicon nitride substrate falls within a range from 10 to 200 mm, and a transverse width (L2) of the silicon nitride substrate falls within a range from 10 to 200 mm.Type: GrantFiled: January 26, 2016Date of Patent: October 23, 2018Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Hiromasa Kato, Noboru Kitamori, Takayuki Naba, Masashi Umehara
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Publication number: 20180190568Abstract: The present invention provides a ceramic metal circuit board including a ceramic substrate and metal plates bonded to both surfaces of the ceramic substrate through respective bonding layers, wherein a metal film is provided on a surface of one metal plate bonded to one surface of the ceramic substrate; and at least a part of another metal plate bonded to another surface of the ceramic substrate is not provided with the metal film. Preferably, a protruding portion is formed as a portion of the bonding layer so as to protrude from a side surface of each of the metal plates. According to the above-described configuration, it is possible to provide a ceramic circuit board which is easy to use according to the parts to be bonded and is excellent in heat-cycle resistance characteristics.Type: ApplicationFiled: June 1, 2016Publication date: July 5, 2018Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Takayuki NABA, Hiromasa KATO, Noboru KITAMORI
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Publication number: 20180057412Abstract: The present invention provides a silicon nitride circuit board in which metal plates are attached on front and rear sides of a silicon nitride substrate having a three-point bending strength of 500 MPa or higher, with attachment layers interposed therebetween, wherein assuming that a thickness of the metal plate on the front side is denoted by t1, and a thickness of the metal plate on the rear side is denoted by t2, at least one of the thicknesses t1 and t2 is 0.6 mm or larger, a numerical relation: 0.10?|t1?t2|?0.30 mm is satisfied, and warp amounts of the silicon nitride substrate in a long-side direction and a short-side direction both fall within a range from 0.01 to 1.0 mm. Due to above configuration, TCT properties of the silicon nitride circuit board can be improved even if the thicknesses of the front and rear metal plates are large.Type: ApplicationFiled: July 27, 2016Publication date: March 1, 2018Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa KATO, Noboru KITAMORI
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Publication number: 20180019182Abstract: The present invention provides a silicon nitride circuit board in which metal plates are attached on front and rear sides of a silicon nitride substrate having a three-point flexural strength of 500 MPa or higher, wherein assuming that a thickness of the metal plate on the front side is denoted by t1, and a thickness of the metal plate on the rear side is denoted by t2, a numerical relation: |t1?t2|?0.30 mm is satisfied, and a warp is formed in the silicon nitride substrate so that the silicon nitride substrate is convex toward the metal plate on one of the front side or the rear side; and warp amounts of the silicon nitride substrate in a long-side direction and a short-side direction both fall within a range from 0.01 to 1.0 mm. It is preferable that a longitudinal width (L1) of the silicon nitride substrate falls within a range from 10 to 200 mm, and a transverse width (L2) of the silicon nitride substrate falls within a range from 10 to 200 mm.Type: ApplicationFiled: January 26, 2016Publication date: January 18, 2018Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa KATO, Noboru KITAMORI, Takayuki NABA, Masashi UMEHARA
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Publication number: 20180005918Abstract: To improve a TCT characteristic of a circuit substrate. The circuit substrate comprises a ceramic substrate including a first and second surfaces, and first and second metal plates respectively bonded to the first and second surfaces via first and second bonding layers. A three-point bending strength of the ceramic substrate is 500 MPa or more. At least one of L1/H1 of a first protruding portion of the first bonding layer and L2/H2 of a second protruding portion of the second bonding layer is 0.5 or more and 3.0 or less. At least one of an average value of first Vickers hardnesses of 10 places of the first protruding portion and an average value of second Vickers hardnesses of 10 places of the second protruding portion is 250 or less.Type: ApplicationFiled: August 29, 2017Publication date: January 4, 2018Applicants: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Takayuki NABA, Hiromasa KATO, Masashi UMEHARA
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Patent number: 9357643Abstract: A ceramic/copper circuit board of an embodiment includes a ceramic substrate and first and second copper plates bonded to surfaces of the ceramic substrate via bonding layers containing active metal elements. In cross sections of end portions of the first and second copper plates, a ratio (C/D) of an area C in relation to an area D is from 0.2 to 0.6. The area C is a cross section area of a portion protruded toward an outer side direction of the copper plate from a line AB, and the area D is a cross section area of a portion corresponding to a right-angled triangle whose hypotenuse is the line AB. R-shape sections are provided at edges of upper surfaces of the first and second copper plates, and lengths F of the R-shape sections are 100 ?m or less.Type: GrantFiled: June 16, 2014Date of Patent: May 31, 2016Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Keiichi Yano, Hiromasa Kato, Kimiya Miyashita, Takayuki Naba
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Patent number: 9277639Abstract: The present invention provides a semiconductor circuit board in which a conductor portion is provided on an insulating substrate, wherein a surface roughness of a semiconductor element-mounting section of the conductor portion is 0.3 ?m or lower in arithmetic average roughness Ra, 2.5 ?m or lower in ten-point average roughness Rzjis, 2.0 ?m or smaller in maximum height Rz, and 0.5 ?m or lower in arithmetic average waviness Wa. Further, assuming that a thickness of the insulating substrate is t1 and a thickness of the conductor portion is t2, the thickness of t1 and t2 satisfy a relation: 0.1?t2/t1?50. Due to above structure, even if an amount of heat generation of the semiconductor element is increased, there can be provided a semiconductor circuit board and a semiconductor device having excellent TCT characteristics.Type: GrantFiled: October 1, 2013Date of Patent: March 1, 2016Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa Kato, Masanori Hoshino
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Patent number: 9214617Abstract: An electronic component module has a circuit board in which metal plates are bonded to both surfaces of a ceramic substrate, and an electronic component that is bonded to at least one surface of the metal plate and is operable at least 125° C. The electronic component is bonded to the metal plate via a brazing material layer having a higher melting point than a operating temperature of the electronic component.Type: GrantFiled: August 20, 2012Date of Patent: December 15, 2015Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa Kato, Takayuki Naba, Noritaka Nakayama
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Publication number: 20150257252Abstract: The present invention provides a semiconductor circuit board in which a conductor portion is provided on an insulating substrate, wherein a surface roughness of a semiconductor element-mounting section of the conductor portion is 0.3 ?m or lower in arithmetic average roughness Ra, 2.5 ?m or lower in ten-point average roughness Rzjis, 2.0 ?m or smaller in maximum height Rz, and 0.5 ?m or lower in arithmetic average waviness Wa. Further, assuming that a thickness of the insulating substrate is t1 and a thickness of the conductor portion is t2, the thickness of t1 and t2 satisfy a relation: 0.1?t2/t1?50. Due to above structure, even if an amount of heat generation of the semiconductor element is increased, there can be provided a semiconductor circuit board and a semiconductor device having excellent TCT characteristics.Type: ApplicationFiled: October 1, 2013Publication date: September 10, 2015Applicants: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Hiromasa Kato, Masanori Hoshino
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Patent number: 9101065Abstract: According to one embodiment, a ceramic circuit board includes a ceramic substrate, a copper circuit plate and a brazing material protrudent part. The copper circuit plate is bonded to at least one surface of the ceramic substrate through a brazing material layer including Ag, Cu, and Ti. The brazing material protrudent part includes a Ti phase and a TiN phase by 3% by mass or more in total, which is different from the total amount of a Ti phase and a TiN phase in the brazing material layer that is interposed between the ceramic substrate and the copper circuit plate. The number of voids each having an area of 200 ?m2 or less in the brazing material protrudent part is one or less (including zero).Type: GrantFiled: June 17, 2014Date of Patent: August 4, 2015Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventor: Hiromasa Kato
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Patent number: 9095051Abstract: According to one embodiment, a ceramic substrate for mounting a device is provided. The ceramic substrate includes a through-hole and a recessed portion provided on at least one edge surface thereof.Type: GrantFiled: January 4, 2012Date of Patent: July 28, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiyuki Fukuda, Hiromasa Kato
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Publication number: 20140291699Abstract: A ceramic/copper circuit board of an embodiment includes a ceramic substrate and first and second copper plates bonded to surfaces of the ceramic substrate via bonding layers containing active metal elements. In cross sections of end portions of the first and second copper plates, a ratio (C/D) of an area C in relation to an area D is from 0.2 to 0.6. The area C is a cross section area of a portion protruded toward an outer side direction of the copper plate from a line AB, and the area D is a cross section area of a portion corresponding to a right-angled triangle whose hypotenuse is the line AB. R-shape sections are provided at edges of upper surfaces of the first and second copper plates, and lengths F of the R-shape sections are 100 ?m or less.Type: ApplicationFiled: June 16, 2014Publication date: October 2, 2014Inventors: Keiichi YANO, Hiromasa KATO, Kimiya MIYASHITA, Takayuki NABA
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Publication number: 20140291385Abstract: According to one embodiment, a ceramic circuit board includes a ceramic substrate, a copper circuit plate and a brazing material protrudent part. The copper circuit plate is bonded to at least one surface of the ceramic substrate through a brazing material layer including Ag, Cu, and Ti. The brazing material protrudent part includes a Ti phase and a TiN phase by 3% by mass or more in total, which is different from the total amount of a Ti phase and a TiN phase in the brazing material layer that is interposed between the ceramic substrate and the copper circuit plate. The number of voids each having an area of 200 ?m2 or less in the brazing material protrudent part is one or less (including zero).Type: ApplicationFiled: June 17, 2014Publication date: October 2, 2014Inventor: Hiromasa KATO
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Patent number: 8785785Abstract: According to one embodiment, a ceramic circuit board includes a ceramic substrate, a copper circuit plate and a brazing material protrudent part. The copper circuit plate is bonded to at least one surface of the ceramic substrate through a brazing material layer including Ag, Cu, and Ti. The brazing material protrudent part includes a Ti phase and a TiN phase by 3% by mass or more in total, which is different from the total amount of a Ti phase and a TiN phase in the brazing material layer that is interposed between the ceramic substrate and the copper circuit plate. The number of voids each having an area of 200 ?m2 or less in the brazing material protrudent part is one or less (including zero).Type: GrantFiled: March 13, 2012Date of Patent: July 22, 2014Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventor: Hiromasa Kato
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Patent number: 8518554Abstract: A ceramic-metal composite includes a ceramic substrate, an active metal brazing alloy layer, and a metal plate bonded to the ceramic substrate through the active metal brazing alloy layer disposed therebetween. The active metal brazing alloy layer contains a transition metal that is at least one element selected from Group-8 elements specified in the periodic table. According to the above configuration, the following composite and device can be provided: the ceramic-metal composite that exhibits high bonding strength, heat cycle resistance, durability, and reliability even if the ceramic-metal composite is used in a power module and a semiconductor device including the ceramic-metal composite.Type: GrantFiled: July 3, 2007Date of Patent: August 27, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Takayuki Naba, Michiyasu Komatsu, Noritaka Nakayama, Hiromasa Kato
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Publication number: 20120305304Abstract: An electronic component module 1 has a circuit board 2 in which metal plates 5 and 7 are bonded to both surfaces of a ceramic substrate 3, and an electronic component 9 that is bonded to at least one surface of the metal plate 5 and is operable at least 125° C. The electronic component 9 is bonded to the metal plate 5 via a brazing material layer 8 having a higher melting point than a operating temperature of the electronic component 9.Type: ApplicationFiled: August 20, 2012Publication date: December 6, 2012Inventors: Hiromasa KATO, Takayuki NABA, Noritaka NAKAYAMA
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Patent number: 8273993Abstract: An electronic component module 1 has a circuit board 2 in which metal plates 5 and 7 are bonded to both surfaces of a ceramic substrate 3, and an electronic component 9 that is bonded to at least one surface of the metal plate 5 and is operable at least 125° C. The electronic component 9 is bonded to the metal plate 5 via a brazing material layer 8 having a higher melting point than a operating temperature of the electronic component 9.Type: GrantFiled: March 5, 2007Date of Patent: September 25, 2012Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Hiromasa Kato, Takayuki Naba, Noritaka Nakayama
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Publication number: 20120168209Abstract: According to one embodiment, a ceramic circuit board includes a ceramic substrate, a copper circuit plate and a brazing material protrudent part. The copper circuit plate is bonded to at least one surface of the ceramic substrate through a brazing material layer including Ag, Cu, and Ti. The brazing material protrudent part includes a Ti phase and a TiN phase by 3% by mass or more in total, which is different from the total amount of a Ti phase and a TiN phase in the brazing material layer that is interposed between the ceramic substrate and the copper circuit plate. The number of voids each having an area of 200 ?m2 or less in the brazing material protrudent part is one or less (including zero).Type: ApplicationFiled: March 13, 2012Publication date: July 5, 2012Applicants: TOSHIBA MATERIALS CO., LTD., KABUSHIKI KAISHA TOSHIBAInventor: Hiromasa KATO
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Publication number: 20120098020Abstract: According to one embodiment, a ceramic substrate for mounting a device is provided. The ceramic substrate includes a through-hole and a recessed portion provided on at least one edge surface thereof.Type: ApplicationFiled: January 4, 2012Publication date: April 26, 2012Applicants: TOSHIBA MATERIALS CO., LTD., KABUSHIKI KAISHA TOSHIBAInventors: Yoshiyuki FUKUDA, Hiromasa KATO