Patents by Inventor Hiromi Kikuchi

Hiromi Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916183
    Abstract: The power storage device includes power storage units arranged with a conductive plate interposed therebetween in the vertical direction, each of the power storage units includes an electrode stack including bipolar electrodes stacked with a separator interposed therebetween, and a sealing member provided around the electrode stack so as to seal a housing space formed between adjacent electrodes of the electrode stack. At least one of the power storage units is provided with an overhang member on an outer peripheral surface of the sealing member. The overhang member includes an inclined portion that extends from the outer peripheral surface of the sealing member toward the outside of the power storage unit and inclines downward as it leaves away from the outer peripheral surface of the sealing member, and a top portion formed at a lower end of the inclined portion.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: February 27, 2024
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Daiki Terashima, Satoshi Morioka, Takuro Kikuchi, Motoyoshi Okumura, Kojiro Tamaru, Hiromi Ueda, Satoshi Hamaoka, Masahiro Yamada
  • Patent number: 7915533
    Abstract: In the silicon nitride substrate concerning an embodiment of the invention, degree of in-plane orientation fa of ? type silicon nitride is 0.4-0.8. Here, degree of in-plane orientation fa can be determined by the rate of the diffracted X-ray intensity in each lattice plane orientation in ? type silicon nitride. As a result of research by the inventors, it turned out that both high fracture toughness and high thermal conductivity are acquired, when degree of in-plane orientation fa was 0.4-0.8. Along the thickness direction, both the fracture toughness of 6.0 MPa·m1/2 or higher and the thermal conductivity of 90 W/m·K or higher can be attained.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: March 29, 2011
    Assignee: Hitachi Metals, Ltd.
    Inventors: Youichirou Kaga, Hiromi Kikuchi, Hisayuki Imamura, Junichi Watanabe
  • Publication number: 20090039477
    Abstract: In the silicon nitride substrate concerning an embodiment of the invention, degree of in-plane orientation fa of ? type silicon nitride is 0.4-0.8. Here, degree of in-plane orientation fa can be determined by the rate of the diffracted X-ray intensity in each lattice plane orientation in ? type silicon nitride. As a result of research by the inventors, it turned out that both high fracture toughness and high thermal conductivity are acquired, when degree of in-plane orientation fa was 0.4-0.8. Along the thickness direction, both the fracture toughness of 6.0 MPa·m1/2 or higher and the thermal conductivity of 90 W/m·K or higher can be attained.
    Type: Application
    Filed: April 14, 2006
    Publication date: February 12, 2009
    Applicant: Hitachi Metals, Ltd.
    Inventors: Youichirou Kaga, Hiromi Kikuchi, Hisayuki Imamura, Junichi Watanabe
  • Patent number: 7304831
    Abstract: A multilayer capacitor comprises a ceramic sintered body, an internal electrode disposed in the ceramic sintered body, and an external electrode disposed on an external surface of the ceramic sintered body. The external electrode has a first electrode layer formed on the external surface of the ceramic sintered body, a second electrode layer formed on the first electrode layer, and a conductive resin layer formed on the second electrode layer. The internal electrode and the first electrode layer consist primarily of a base metal. The second electrode layer consists primarily of a noble metal or a noble metal alloy. The conductive resin layer contains a noble metal or a noble metal alloy as a conductive material.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: December 4, 2007
    Assignee: TDK Corporation
    Inventors: Akitoshi Yoshii, Taisuke Ahiko, Atsushi Takeda, Shirou Ootsuki, Shinya Onodera, Miki Kimura, Hiromi Kikuchi
  • Publication number: 20060187613
    Abstract: A multilayer capacitor comprises a ceramic sintered body, an internal electrode disposed in the ceramic sintered body, and an external electrode disposed on an external surface of the ceramic sintered body. The external electrode has a first electrode layer formed on the external surface of the ceramic sintered body, a second electrode layer formed on the first electrode layer, and a conductive resin layer formed on the second electrode layer. The internal electrode and the first electrode layer consist primarily of a base metal. The second electrode layer consists primarily of a noble metal or a noble metal alloy. The conductive resin layer contains a noble metal or a noble metal alloy as a conductive material.
    Type: Application
    Filed: February 6, 2006
    Publication date: August 24, 2006
    Applicant: TDK Corporation
    Inventors: Akitoshi Yoshii, Taisuke Ahiko, Atsushi Takeda, Shirou Ootsuki, Shinya Onodera, Miki Kimura, Hiromi Kikuchi
  • Patent number: 6704189
    Abstract: A multilayer ceramic capacitor with external terminals having terminal electrodes and external terminals of the electronic device body electrically bonded through a solder layer, wherein the solder layer is comprised of an Sn—Sb high temperature lead-free solder, the ratio between the Sn and Sb in this solder layer is, by ratio by weight percent, in a range of Sn/Sb=70/30 to 90/10, and the solder layer and terminal electrodes are formed between them with a diffusion layer formed by diffusion of a conductive ingredient of the terminal electrodes into the solder layer.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: March 9, 2004
    Assignee: TDK Corporation
    Inventors: Akitoshi Yoshii, Kazuhiko Kikuchi, Takashi Kamiya, Hiromi Kikuchi
  • Publication number: 20030189817
    Abstract: A multilayer ceramic capacitor with external terminals having terminal electrodes and external terminals of the electronic device body electrically bonded through a solder layer, wherein the solder layer is comprised of an Sn—Sb high temperature lead-free solder, the ratio between the Sn and Sb in this solder layer is, by ratio by weight percent, in a range of Sn/Sb=70/30 to 90/10, and the solder layer and terminal electrodes are formed between them with a diffusion layer formed by diffusion of a conductive ingredient of the terminal electrodes into the solder layer.
    Type: Application
    Filed: April 2, 2003
    Publication date: October 9, 2003
    Applicant: TDK Corporation
    Inventors: Akitoshi Yoshii, Kazuhiko Kikuchi, Takashi Kamiya, Hiromi Kikuchi
  • Patent number: 6221271
    Abstract: A piezoelectric sintered ceramic made of (a) 100 parts by weight of main components having a composition represented by the general formula: (Pb1−yMy)(ZrzTi1−z)O3, wherein M is at least one element selected from the group consisting of Sr, Ba and Ca, and y and z are numbers satisfying 0.01≦y≦0.10, and 0.51≦z≦0.56, respectively; (b) 0.05-1.0 parts by weight, as Fe2O3, of Fe; and (c) 10-1000 ppm of Ag.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: April 24, 2001
    Assignee: Hitachi Metals, Ltd.
    Inventors: Junichi Watanabe, Hiromi Kikuchi, Hideko Fukushima, Shigeru Jomura
  • Patent number: 5435826
    Abstract: A sputtering target having a relative density of 90% or more and a single-phase structure for forming a indium-tin oxide layer of low resistance is produced by pressing a composite powder of indium oxide and tin oxide having an average diameter of 0.1 .mu.m or less and a tin content controlled to 1.5-6 weight %; and sintering the pressed composite powder at 1500.degree.-1700.degree. C. in an oxygen atmosphere pressurized at 1-10 atm.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: July 25, 1995
    Assignee: Hitachi Metals, Ltd.
    Inventors: Masahiko Sakakibara, Hiromi kikuchi
  • Patent number: 5008942
    Abstract: A diagnostic voice instructing apparatus has a recording/playback device including a voice recording/playback LSI and a RAM, and converts an arbitrary instruction voice to a patient, which has been input through a microphone by a user for use in a scanning operation, into a digital signal and stores the signal in corresponding one of 15 channels of the RAM, the instructing voice may be input in an arbitrary language, dialect or expression. The recording/playback device is coupled to a scan controller, which controls the scanning operation of a CT apparatus, and a host controller, which sends commands to the recording/playback device and scan controller and receives control data from the scan controller. The host controller permits an operator to prepare ID data to each patient, which includes the name, and condition, of the patient, as well as designation of the necessary instructing voice to the patient in terms of a channel quantity.
    Type: Grant
    Filed: November 30, 1988
    Date of Patent: April 16, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiromi Kikuchi