Patents by Inventor Hiromichi Tai

Hiromichi Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8896365
    Abstract: According to one embodiment, a semiconductor switch includes a main element including a switching element and an antiparallel diode, and a reverse voltage application circuit. The reverse voltage application circuit includes an auxiliary electric-power supply, a high-speed free wheeling diode, an auxiliary element, and a capacitor. The high-speed free wheeling diode comprises a plurality of diodes connected in series.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyasu Takimoto, Hiroshi Mochikawa, Yosuke Nakazawa, Hiromichi Tai, Atsuhiko Kuzumaki
  • Patent number: 8836311
    Abstract: Provided is a power converter having a switching circuit wherein a surge voltage of a plurality of switching elements connected in series is suppressed and loss is not concentrated to a specific switching element. The switching circuit is provided with: a non-latching type switching element having two main terminals and one control terminal; a voltage detecting means which detects a voltage applied between the main terminals of the switching element; a control current supply for supplying the control terminal with a control signal corresponding to the voltage detected by the voltage detector; and a delay device for delaying the control signal.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiromichi Tai, Takeru Murao
  • Patent number: 8791744
    Abstract: According to one embodiment, a semiconductor switch includes a first element that includes a switching element and an anti-parallel diode. The switching element has a breakdown voltage and is coupled to a control terminal and second and third terminals. The semiconductor switch further includes a second element having a breakdown voltage lower than that of the first element. The second element is coupled to a control terminal and second and third terminals. The semiconductor switch also includes a flyback diode having a breakdown voltage substantially similar to that of the first element. A negative electrode of the first element is connected to a negative electrode of the second element and the flyback diode is connected in parallel between a positive terminal of the first element and a positive terminal of the second element. The control terminal for the first element and the control terminal for the second element are coupled to one or more control circuits independently of each other.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: July 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyasu Takimoto, Hiromichi Tai, Hiroshi Mochikawa, Akihisa Matsushita
  • Publication number: 20120206899
    Abstract: According to one embodiment, a semiconductor switch includes a main element including a switching element and an antiparallel diode, and a reverse voltage application circuit. The reverse voltage application circuit includes an auxiliary electric-power supply, a high-speed free wheeling diode, an auxiliary element, and a capacitor. The high-speed free wheeling diode comprises a plurality of diodes connected in series.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 16, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyasu TAKIMOTO, Hiroshi Mochikawa, Yosuke Nakazawa, Hiromichi Tai, Atsuhiko Kuzumaki
  • Publication number: 20110309874
    Abstract: According to one embodiment, a semiconductor switch includes a first element that includes a switching element and an anti-parallel diode. The switching element has a breakdown voltage and is coupled to a control terminal and second and third terminals. The semiconductor switch further includes a second element having a breakdown voltage lower than that of the first element. The second element is coupled to a control terminal and second and third terminals. The semiconductor switch also includes a flyback diode having a breakdown voltage substantially similar to that of the first element. A negative electrode of the first element is connected to a negative electrode of the second element and the flyback diode is connected in parallel between a positive terminal of the first element and a positive terminal of the second element. The control terminal for the first element and the control terminal for the second element are coupled to one or more control circuits independently of each other.
    Type: Application
    Filed: February 14, 2011
    Publication date: December 22, 2011
    Inventors: Kazuyasu Takimoto, Hiromichi Tai, Hiroshi Mochikawa, Akihisa Matsushita
  • Patent number: 7804353
    Abstract: The present invention includes: a main voltage detection unit for detecting a voltage applied between main electrodes of an electrical power switching element; a control current source for injecting a current into a gate electrode of the electrical power switching element in accordance with the voltage detected by the main voltage detection unit; a main current detection unit for detecting a main current flowing between the main electrodes of the electrical power switching element; and an adjustment unit for adjusting a current of the control power source in accordance with the main current detected by the main current detection unit.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: September 28, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiromichi Tai
  • Publication number: 20100219877
    Abstract: Provided is a power converter having a switching circuit wherein a surge voltage of a plurality of switching elements connected in series is suppressed and loss is not concentrated to a specific switching element. The switching circuit is provided with: a non-latching type switching element having two main terminals and one control terminal; a voltage detecting means which detects a voltage applied between the main terminals of the switching element; a control current supply for supplying the control terminal with a control signal corresponding to the voltage detected by the voltage detector; and a delay device for delaying the control signal.
    Type: Application
    Filed: April 9, 2010
    Publication date: September 2, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiromichi TAI, Takeru MURAO
  • Patent number: 7570102
    Abstract: A one mode of a gate driving circuit that drives a gate electrode of an electric power switching element (9), comprising drive means (6) configured to supply to the gate electrode a current in accordance with a voltage applied across the principal electrodes of the electric power switching element (9), while utilizing a voltage produced by dividing a voltage applied across the principal electrodes by use of resistors (4a, 4b). Since the drive means (6) utilizes a voltage produced by a voltage dividing resistor circuit, which divides the voltage applied across the principal electrodes of the electric power switching element (9) as a power source voltage, only an addition of the dividing resistors (4a, 4b) makes it possible to constitute the power source for the current drive means (6).
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: August 4, 2009
    Assignee: Toshiba Mitsubishi - Electric Industrial Systems Corporation
    Inventor: Hiromichi Tai
  • Publication number: 20070187217
    Abstract: The present invention includes: a main voltage detection unit for detecting a voltage applied between main electrodes of an electrical power switching element; a control current source for injecting a current into a gate electrode of the electrical power switching element in accordance with the voltage detected by the main voltage detection unit; a main current detection unit for detecting a main current flowing between the main electrodes of the electrical power switching element; and an adjustment unit for adjusting a current of the control power source in accordance with the main current detected by the main current detection unit.
    Type: Application
    Filed: December 11, 2006
    Publication date: August 16, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hiromichi Tai
  • Publication number: 20070080738
    Abstract: A one mode of a gate driving circuit that drives a gate electrode of an electric power switching element (9), comprising drive means (6) configured to supply to the gate electrode a current in accordance with a voltage applied across the principal electrodes of the electric power switching element (9), while utilizing a voltage produced by dividing a voltage applied across the principal electrodes by use of resistors (4a, 4b). Since the drive means (6) utilizes a voltage produced by a voltage dividing resistor circuit, which divides the voltage applied across the principal electrodes of the electric power switching element (9) as a power source voltage, only an addition of the dividing resistors (4a, 4b) makes it possible to constitute the power source for the current drive means (6).
    Type: Application
    Filed: September 10, 2004
    Publication date: April 12, 2007
    Inventor: Hiromichi Tai
  • Patent number: 6903597
    Abstract: An object of the present invention is to provide a simple and easily adjustable gate driving circuit for an active gate drive. As a configuration for this, a gate driving circuit includes a delay control signal creation unit configured to create a delay control signal having a certain delay time with respect to a control signal given from a superior control device, a reference signal creation unit configured to create a voltage reference signal by waveform-shaping of the delay control signal, a voltage detector configured to detect a voltage between electrodes of a voltage-driven type switching element and output a principal voltage detection signal, and a comparator configured to compare the principal voltage detection signal with the voltage reference signal and output a comparison result signal which controls a current source.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: June 7, 2005
    Assignee: Toshiba Mitsubishi-Electric Industrial Systems Corporation
    Inventor: Hiromichi Tai
  • Publication number: 20040145406
    Abstract: An object of the present invention is to provide a simple and easily adjustable gate driving circuit for an active gate drive. As a configuration for this, a gate driving circuit includes a delay control signal creation unit configured to create a delay control signal having a certain delay time with respect to a control signal given from a superior control device, a reference signal creation unit configured to create a voltage reference signal by waveform-shaping of the delay control signal, a voltage detector configured to detect a voltage between electrodes of a voltage-driven type switching element and output a principal voltage detection signal, and a comparator configured to compare the principal voltage detection signal with the voltage reference signal and output a comparison result signal which controls a current source.
    Type: Application
    Filed: January 15, 2004
    Publication date: July 29, 2004
    Applicant: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventor: Hiromichi Tai
  • Patent number: 5483192
    Abstract: A gate power supply circuit including a switching device and a gate drive circuit connected to the switching device for generating a gate signal to be supplied to a gate of the switching device. The gate power supply circuit further includes a series circuit of a snubber capacitor and a snubber diode connected in parallel with the switching device, and an inductor, a first terminal of which is connected to a connection point of the switching device and the snubber diode. The gate power supply circuit also includes a series circuit of power disposing circuit and a first diode, connected between a series connection point of the snubber capacitor and the snubber diode and a second terminal of the inductor. The gate power supply circuit further includes a series circuit of a power supplying capacitor and a second diode, connected in parallel with the inductor.
    Type: Grant
    Filed: September 7, 1993
    Date of Patent: January 9, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiromichi Tai
  • Patent number: 5450308
    Abstract: A gate power supply circuit including a switching device and a gate drive circuit connected to the switching device for generating a gate signal to be supplied to a gate of the switching device. The gate power supply circuit further includes a first series circuit of a first capacitor and an inductor, connected in parallel with the switching device, and a second series circuit of a first diode and a second capacitor, connected in parallel with the inductor. The gate drive circuit is connected to the second capacitor to receive energy stored in the second capacitor as power source for the gate drive circuit.
    Type: Grant
    Filed: February 23, 1994
    Date of Patent: September 12, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiromichi Tai
  • Patent number: 5299153
    Abstract: A system for recording and reproducing a charge latent image in a recording medium has a transparent electrode (3), a photoconductive layer (4) on the electrode (3), a dielectric layer (8), a photoconductor layer (4) and a charge transfer suppressive layer (16). The system also includes a biasing element including a pair of electrodes (3, 19), a power source (10) for applying an electric field between the pair of electrodes, and an optical system (1) for directing an electro-magnetic radiation beam from an object (0) thereby forming an image thereof in the photoconductive layer (4).
    Type: Grant
    Filed: January 29, 1992
    Date of Patent: March 29, 1994
    Assignee: Victor Company Of Japan, Ltd.
    Inventors: Itsuo Takanashi, Shintaro Nakagaki, Hirohiko Shinonaga, Tsutou Asakura, Masato Furuya, Hiromichi Tai, Tetsuji Suzuki
  • Patent number: 5268763
    Abstract: A voltage is electrostatically induced at a sensing device in correspondence with a surface potential of a measured object. In the case where the sensing device uses a field effect transistor in transferring detected information, there are some factors decreasing the accuracy of detection. Various new arrangements prevent such decreases in the accuracy of detection. In the case of the surface potential of the measured object corresponds to an optical image, new arrangements ensure accurate detection of the optical image. In some cases, color component signals are obtained on the basis of a detection signal.
    Type: Grant
    Filed: November 17, 1992
    Date of Patent: December 7, 1993
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Itsuo Takanashi, Shintaro Nakagaki, Tsutou Asakura, Masato Furuya, Hirohiko Shinonaga, Hiromichi Tai
  • Patent number: 5260796
    Abstract: A voltage is electrostatically induced at a sensing device in correspondence with a surface potential of a measured object. In the case where the sensing device uses a field effect transistor in transferring detected information, there are some factors decreasing the accuracy of detection. Various new arrangements prevent such decreases in the accuracy of detection. In the case of the surface potential of the measured object corresponds to an optical image, new arrangements ensure accurate detection of the optical image. In some cases, color component signals are obtained on the basis of a detection signal.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: November 9, 1993
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Itsuo Takanashi, Shintaro Nakagaki, Tsutou Asakura, Masato Furuya, Hirohiko Shinonaga, Hiromichi Tai
  • Patent number: 5227885
    Abstract: A charge latent image recording medium includes an electrode, a dielectric member, a member suppressing a transfer of charges, and a photoconductive member laminated in the order without any gaps therebetween. A system for reading a charge latent image recorded in a recording member includes means for projecting a first electromagnetic radiation beam along a path extending to the recording member, means projecting a second electromagnetic radiation beam approximately along the path for reading the charge latent image, guiding means disposed in the path changing electric resistance thereof along the path threthrough, in response to the first electromagnetic radiation beam projected thereto, for guiding an electric field of charges of the charge latent iamge.
    Type: Grant
    Filed: June 26, 1991
    Date of Patent: July 13, 1993
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Itsuo Takanashi, Shintaro Nakagaki, Hirohiko Shinonaga, Tsutou Asakura, Masato Furuya, Hiromichi Tai
  • Patent number: 5226029
    Abstract: An electric charge recording/reproducing apparatus for focusing an electromagnetic radiation ray containing a recording object information signal onto a photoconductive layer member (PCL) in an electric charge image recording medium (D) comprising a laminate of at least an electric charge retention layer, member (CHL), photoconductive layer member (PCL) and a first electrode (E) using an objective lens (318) which is driven and displaced in an optical axis direction by an actuator (ACT) of an automatic focusing system; and to integratedly connect and fix a moving electrode (Em) onto the objective lens (318), the moving electrode (Em) being intended to generate an electric field for positioning the electric charge image recording medium (D) in the electric field of a predetermined electric field intensity, towards the electrode in, the electric charge image recording medium (D).
    Type: Grant
    Filed: May 16, 1990
    Date of Patent: July 6, 1993
    Assignee: Victor Company of Japan
    Inventors: Itsuo Takanashi, Takashi Yamamura, Toshikatsu Ichito, Hiroki Kitamura, Hiromichi Tai
  • Patent number: 5196925
    Abstract: A charge latent image is formed on a recording medium in response to information and a reference pattern so that the information and the reference pattern are recorded on the recording medium. During a reproducing process, the information is read out from the recording medium and an information signal representing the readout information is generated. In addition, the reference pattern is read out from the recording medium and a reference signal representing the reference pattern is generated. The information is demodulated from the information signal. The reference signal is used in the demodulation of the information from the information signal.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: March 23, 1993
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Itsuo Takanashi, Shintaro Nakagaki, Hirohiko Shinonaga, Tsutou Asakura, Masato Furuya, Hiromichi Tai