Patents by Inventor Hiromitsu TERAUCHI

Hiromitsu TERAUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10522333
    Abstract: A vacuum processing apparatus includes a vacuum processing chamber, an upper electrode, a lower electrode, a first high-frequency power source, a second high-frequency power source, a first matching box, a second matching box, a copper plate for connecting an electrode shaft of the lower electrode with the second matching box, a drive base on which the electrode shaft of the lower electrode and the second matching box are mounted, a drive unit for ascending or descending the drive base, and an exhaust unit disposed at a position equally distanced from an exhaust outlet by a distance.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: December 31, 2019
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yusaku Sakka, Hiromichi Kawasaki, Tsutomu Iida, Hiromitsu Terauchi, Masahiro Nagatani, Yasushi Sonoda
  • Publication number: 20180151336
    Abstract: A vacuum processing apparatus includes a vacuum processing chamber, an upper electrode, a lower electrode, a first high-frequency power source, a second high-frequency power source, a first matching box, a second matching box, a copper plate for connecting an electrode shaft of the lower electrode with the second matching box, a drive base on which the electrode shaft of the lower electrode and the second matching box are mounted, a drive unit for ascending or descending the drive base, and an exhaust unit disposed at a position equally distanced from an exhaust outlet by a distance.
    Type: Application
    Filed: September 19, 2017
    Publication date: May 31, 2018
    Inventors: Yusaku SAKKA, Hiromichi KAWASAKI, Tsutomu IIDA, Hiromitsu TERAUCHI, Masahiro NAGATANI, Yasushi SONODA
  • Patent number: 9831096
    Abstract: A plasma processing method including disposing a wafer to be processed on a sample stage disposed in a processing chamber within a vacuum vessel, supplying an electric field using first high frequency power for plasma forming into the processing chamber and forming plasma, and supplying second high frequency power for bias potential forming to electrodes disposed within the sample stage and processing a film on a top surface of the wafer. At least the first or second high frequency power repeats a change of becoming a plurality of predetermined amplitudes for predetermined periods with a predetermined repetition period. In the processing of the film, supply of the high frequency power is changed by finally increasing a predetermined magnitude of amplitude among the repetition period, ratio of the period, and amplitude of the at least the first or second high frequency power, or first decreasing a predetermined magnitude of the amplitude.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: November 28, 2017
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiromitsu Terauchi, Tsutomu Iida, Yuuzou Oohirabaru
  • Patent number: 9711375
    Abstract: A plasma processing apparatus is provided including a processing chamber disposed within a vacuum vessel to form plasma therein, a processing stage disposed in the processing chamber to mount a wafer thereon, a first power supply for outputting an electric field supplied to form the plasma and forming an electric field of a first frequency supplied with repetition of a high output and a low output during processing of the wafer, a second power supply for supplying power of a second frequency to an electrode disposed within the processing stage, and a control device for causing a first value between load impedance at time of the high output of the electric field and load impedance at time of the low output of the electric field to match with impedance of the first power supply.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: July 18, 2017
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiromitsu Terauchi, Tsutomu Iida, Koichi Yamamoto
  • Publication number: 20160211153
    Abstract: A plasma processing method including disposing a wafer to be processed on a sample stage disposed in a processing chamber within a vacuum vessel, supplying an electric field using first high frequency power for plasma forming into the processing chamber and forming plasma, and supplying second high frequency power for bias potential forming to electrodes disposed within the sample stage and processing a film on a top surface of the wafer. At least the first or second high frequency power repeats a change of becoming a plurality of predetermined amplitudes for predetermined periods with a predetermined repetition period. In the processing of the film, supply of the high frequency power is changed by finally increasing a predetermined magnitude of amplitude among the repetition period, ratio of the period, and amplitude of the at least the first or second high frequency power, or first decreasing a predetermined magnitude of the amplitude.
    Type: Application
    Filed: January 14, 2016
    Publication date: July 21, 2016
    Inventors: Hiromitsu TERAUCHI, Tsutomu IIDA, Yuuzou OOHIRABARU
  • Publication number: 20150371876
    Abstract: A plasma processing apparatus is provided including a processing chamber disposed within a vacuum vessel to form plasma therein, a processing stage disposed in the processing chamber to mount a wafer thereon, a first power supply for outputting an electric field supplied to form the plasma and forming an electric field of a first frequency supplied with repetition of a high output and a low output during processing of the wafer, a second power supply for supplying power of a second frequency to an electrode disposed within the processing stage, and a control device for causing a first value between load impedance at time of the high output of the electric field and load impedance at time of the low output of the electric field to match with impedance of the first power supply.
    Type: Application
    Filed: February 19, 2015
    Publication date: December 24, 2015
    Inventors: Hiromitsu TERAUCHI, Tsutomu IIDA, Koichi YAMAMOTO