Abstract: A time base correcting circuit is provided in which a time base error in a video signal is corrected by converting the video signal to a digital form which is then recorded into a memory with a write-in clock signal synchronized with a horizontal synchronizing signal or a color burst signal carried in the video signal, reading the digital signal with a read-out clock signal generated from a reference clock signal, and converting it into an analog form. In particular, a velocity error data is added to a corresponding horizontal blanking period of the video signal and after processing of the signals having time delays and continuation errors in the time base, the velocity error data is extracted from the horizontal blanking period of the video signal. Then, the read-out clock signal is phase modulated with the velocity error data extracted and used for correction of the velocity error in the video signal of analog form converted from its digital form.

Abstract: In a system for eliminating time base fluctuation of a video signal having a synchronizing signal and a burst reproduced from a video disk, for example, the synchronism is first coarsely pulled in on the basis of the horizontal synchronizing signal and then precisely follows the time base fluctuation on the basis of the burst signal. A shift of the output synchronizing signal is corrected by using a phase detection of an input horizontal synchronizing signal when an output synchronizing signal is produced on the basis of the read address of a memory for eliminating time base fluctuation, thereby preventing, for example, a superimposed character using the output synchronizing signal from fluctuating on a picture.

Abstract: A video disc is produced from a master video disc which has recorded therein a video signal including a synchronous signals occurring periodically and divided into plural channels by the cycle of the synchronous signals. The plural channel signals are recorded on a group of plural tracks, respectively. In the case of reproducing the video disc, the plural channel signals are reproduced from the group of plural tracks, respectively. Synchronous signals are detected from the reproduced signals. The reproduced channel signals in a period of the synchronous signal are stored in plural memories based on the synchronous signals detected. The stored plural channel signals are continuously reproduced by successively reading from the memories of channels by switching at synchronous intervals. The signal bandwidth of the channels becomes 1/n of the original video signal by recording and reproducing the video signal by dividing it into plural channels(n channels) in such manner.

Abstract: A synchronous signal generator for use with the MUSE signal in the MUSE system which is a high definition television systems. A PLL circuit including a phase comparator and a voltage-controlled oscillator and a counter, is used to generate a system clock synchronized with an external clock. A frame synchronizing signal detected through a frame sychronization detection circuit from an inputted digital MUSE signal frame-resets the counter through a window circuit. The frame synchronization is established at an accuracy of a set range of the window circuit. Also, in this case, if the sychronization deviates on a clock by clock basis, a sampling phase error from a phase error computing circuit is monitored by a comparator circuit so that a deviation in the synchronization can be detected. When the synchronization deviates, by horizonally resetting the counter, the clock synchronization can be established.

Abstract: A videodisc reproducing apparatus includes a pilot carrier extraction circuit for extracting a pilot carrier from a videodisc reproduced signal and a clock generating circuit. The clock generating circuit includes an analog/digital converter and a phase-locked loop oscillator for generating a sampling clock signal for the analog/digital converter, whereby the videodisc reproduced signal is converted into digital form in synchronism with the pilot carrier. A phase-shift circuit is provided for phase shifting the sampling clock signal and for applying a thus phase-shifted sampling clock signal to the analog/digital converter. A phase detecting circuit is provided for detecting a digital sampling phase of a synchronizing signal included in a MUSE signal of the videodisc reproduced signal which has been converted into digital form according to positional information in the synchronizing signal of the videodisc reproduced signal detected by a synchronizing signal detection circuit.

Abstract: A clamp system for television signal comprises a first clamp device for clamping to a clamp control voltage supplied from an external source by a horizontal clamp pulse and a second clamp device for controlling the DC potential of the television signal by adding the externally-supplied control voltage to an input television signal. The first clamp device is used during the period requiring an early clamp start, and the second clamp device is operated under normal conditions.

Abstract: A television video signal control system is disclosed in which an amplitude control signal and a clamp voltage control signal digitally detected in the automatic gain control and clamp voltage control of a television signal receiver respectively are applied alternately to a single D/A converter. The resulting analog signal is sampled and held alternately at holding circuits corresponding to the two control signals. A D/A converter for converting the two control signals from digital to analog state is thus saved as compared with the prior art.

Abstract: Disclosed is an automatic gain control device which comprises: a first amplitude detection circuit for detecting an average amplitude value of a television video signal, a peak amplitude value of the same television video signal, or a value obtained by mixing the average amplitude value and the peak amplitude value with a predetermined mixing ratio; a second amplitude detection circuit for detecting an amplitude value of a vertical or horizontal synchronizing signal in the television video signal; an amplitude control circuit for controlling an amplitude of an input television video signal; a synchronization circuit for detecting a vertical synchronizing signal and a horizontal synchronizing signal in the television video signal so as to generate various pulses including a clock pulse synchronized with the input television video signal by controlling an oscillation frequency of an oscillation circuit; and a synchronization phase lock detection circuit for detecting whether the synchronization circuit has been

Abstract: A recording and reproducing apparatus is disclosed in whic

Abstract: A delay circuitry for producing a delayed signal the gain of which is stable irrespective of drift and fluctuation of the delay time of a delay line employed therein, which drift and fluctuation are caused by the changes in the conditions around the delay line.In this circuitry, a carrier signal is modulated with an input signal and the modulated carrier signal is then delayed in the delay line, the delay time of which is unstable due to the conditions around the delay line. The modulated and delayed carrier signal is detected by a synchronous detector with a reference signal, the phase of which is adjusted so that it is always in phase with the modulated and delayed carrier signal to produce the delayed signal which is stable irrespective of the drift and the fluctuation of the delay time.