Abstract: A frame phase synchronous system, which is accurate with a simple configuration for adjusting phase synchronization in a digital mobile communications system, is provided. A relay node measures a frame phase difference with respect to other relay nodes and obtains an optimum shift value as a first shift value, which is used for adjusting the phase in the relay node and for notifying to a switching node connected as a slave.

Abstract: ATM test equipment are used as a source node and a responder node for conducting a test in a number of modes. At the source node, a test cell is formulated according to a selected test mode with a header identifying the source node and a responder node and a test mode value identifying the selected test mode, and transmits the test cell to an ATM network, and receives a response cell from the network to analyze data contained in the received response cell according to the test mode value of the response cell. The response cell is formulated at the responder node with a header identifying the responder node and the source node and the test mode value of the received test cell. At the responder node, data contained in the received test cell is also analyzed according to the test mode value of the test cell.

Abstract: For selective call of mobile units operable at different bit rates, a central station announces a launch start instant of each signal frame to a plurality of base stations based on phase coincident clocks used individually in the central and the base stations. Responsive to call requests of the different bit rates, their time sequential order in each signal frame, and a switching instants of switching one of the bit rates to another, the base stations transmit the call radio signals starting simultaneously in phase coincidence at the launch start instant Preferably, the central and the base stations deal with the requests as packets. Any one of the base stations can reduce its transmission power of the call radio signals if a failure is found therein in one of the call requests delivered thereto.

Abstract: After molten resin is injected into a mold cavity, an inert gas is sent from an inert gas supply device into the molten resin through a change-over valve and a gas nozzle device so that the molten resin is injection molded. At the same time, a tub is filled with part of the molten resin through a tub communication path. Thereafter, a burr portion of the injection-molded resin is bored using a boring punch so as to make a space within the hollow resin body communicate with the atmosphere. Next, the change-over valve is switched to send a cooling gas from a cooling gas supply device to the hollow space within the hollow resin body so as to cool the injection-molded resin.

Abstract: A central station and each base station have a timer indicating time instants coincident with each other. A common transmission start time instant is provided from the central station to each base station so as to match the transmission start time instant to start transmission of the signal frame in each station. The central station makes the call requests of different bit rates contained in one signal frame and broadcasts to each station the transmission start time instant for the signal frame, the order of the call requests within the signal frame, and bit rate switch timings. When the transmission start time instant arrives, the base station reproduces call signals from the call requests in accordance with the designated order. Reproducing clock pulses are switched with reference to the bit rate switch timings sent from the central station. Thus, each station can transmit the call signals of the different bit rates in one signal frame with their phases coincident with each other.

Abstract: For synchronization signals of zeroth and first series, a synchronization signal processing system comprises synchronization trunk device of the zeroth and the first series (77(0), 77(1)) for producing particular signals of the zeroth and the first series, respectively, and being exclusively operable in master and slave states.

Abstract: A system is provided for processing synchronization signals. A plurality of synchronization signals are received having different periods and different degrees of priority, and are used to generate a regenerated synchronization signal in response to clock pulses. A selector is used for selecting a selected synchronization signal, from among those received synchronization signals having a correct period. The selected synchronization signal is chosen based upon the different degrees of priority. A nonvolatile memory stores memorized synchronization signal and an allowable phase range. An address counter, which receives as an input a controllable initial value, counts the clock pulses to produce a clock count over a period of time, and to cause the nonvolatile memory to output the stored synchronization signal as a read-out synchronization signal and to output the stored allowable phase range as a read-out range, in response to the clock count.

Abstract: A system for use in a local switching center is provided for processing synchronization signals. A transmission sync signal is generated at the local switching center for transmission to a switching center of a higher hierarchy for looping back to the local switching center. The looped back sync signal has a propagation delay time with respect to the transmission sync signal. A time division switch produces clock pulses. A stored pattern is read out of a non-volatile memory according to an address value provided by an address counter which counts the clock pulses of the time division switch. A delay time is also read out of the non-volatile memory according to the same address value. A phase difference signal is produced by comparing the length of the propagation delay time with the delay time read out of the non-volatile memory.

Abstract: An output switch for a switching center of a local trunk device produces an output synchronization signal. The output switch is supplied with a local hierarchy indication signal. Based upon this input signal, a set signal producing device in the output switch produces a set signal for output. The set signal provides an indication that the input local hierarchy signal does not correspond to a highest hierarchy. Additionally, the output switch produces a reset signal when a monitored supply voltage falls below a predetermined threshold. Moreover, in response to both the set signal and the reset signal and a manual switch, the output switch gates the output synchronization signal to produce a switched synchronization signal.

Abstract: For synchronization signals of zeroth and first series, a synchronization signal processing system comprises synchronization trunk device of the zeroth and the first series (77(0), 77(1)) for producing particular signals of the zeroth and the first series, respectively, and being exclusively operable in master and slave states.

Abstract: A phase-locked oscillation circuit system for dividing a clock whose frequency is an integral multiple of a signal produced by dividing the frequency of an input clock. While the input clock to the circuit is shut off, a phase comparator included in the circuit is supplied with a reference signal which is the signal being applied to the compare input of the comparator and the timing of which is modified by a small amount. The system protects the output of a voltage controlled oscillator and, therefore, the output clock of a phase-locked oscillation circuit thereof against disturbances ascribable to the shut-off and recovery of an input clock.