Patents by Inventor Hiroshi Arisaka
Hiroshi Arisaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5538433Abstract: A PGA connector for a microprocessor has a multilayer base board assembly with alternating conductive and dielectric layers of preselected thicknesses through which signal pins, current source pins and a grounding pin extend. The signal pins are insulated from the conductive layers and the current and grounding pin are connected to preselected conductive layers. A series of connecting apertures formed by holes with respective conductive linings extend through the layers at selected locations between pins to interconnect selected conductive layers. The connecting apertures interconnect all conductive layers of the base board or, in another example, alternately positioned connecting apertures interconnect only respective different sets of alternately positioned conductive layers of the base board enabling improved shielding and impedance regulation and matching.Type: GrantFiled: August 18, 1994Date of Patent: July 23, 1996Assignee: Kel CorporationInventor: Hiroshi Arisaka
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Patent number: 5507651Abstract: A film circuit connector in which respective conductive tracks in film contact areas on front, mating faces are pressed together into electrical connection between side walls of a metal channel-section receptacle spring and a compressible elastomeric plug spring which engage respective rear faces of the films, the compressible plug spring providing a counter-force to the receptacle spring force, accommodating any variations in receptacle spring force arising longitudinally thereof, ensuring constant contact force between all tracks. Tabs for anchoring and grounding the receptacle spring to the circuit board are struck out and bent down from opposite walls of the receptacle spring, enabling electrical shielding of contact areas. Linking portions of conductive tracks connecting the mating contact portions on the front face of the film to board connecting portions, are formed on the rear face of the film for electrical and mechanical protection and may be insulated on all sides.Type: GrantFiled: August 1, 1994Date of Patent: April 16, 1996Assignee: Kel CorporationInventors: Mitsuho Tanaka, Akira Katsumata, Hiroshi Arisaka
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Patent number: 5499924Abstract: Connector members have respective film circuits with contact bumps of male and female sets or other complementary configurations and are brought into electrical connection by butting engagement. An elastomer underlies the bumps and is compressed by the engagement to provide contact pressure. The contact bumps of each female set are three or four in number arranged to form a triangular or square ring for engagement with a single male bump to provide a self-centering action. The male contact bump can be elongate so as to bridge completely across the ring. In other examples, both complementary contact bumps are elongate and extend in transverse directions on respective film circuits so that they are brought into transverse engagement, accommodating slight misalignment. Alternatively, instead of a bump configuration, a female member is formed by an aperture in a insulating layer of one film circuit overlying a conductive path and receiving a contact bump of the other film circuit.Type: GrantFiled: July 11, 1994Date of Patent: March 19, 1996Assignee: Kel ComporationInventors: Hiroshi Arisaka, Kenji Kawawada, Kiyoshi Omata
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Patent number: 5480309Abstract: A universal laminated base board assembly for connecting an integrated circuit device to a pcb has a series of alternating, overlying, conductive and insulating layers with two of the conductive layers providing ground and current lines on respective opposite faces. A plurality of through-holes extend through the layers and insulated from the conductive layers for receiving respective socket forming body portions of contact elements selected from signal, current and grounding types with the signal contact elements remaining insulated from the conductive layers and the current and grounding types having conductive layer connecting portions bridging the insulation into connection with the current and ground layers respectively. The contact elements are inserted in those through holes which are aligned with signal, current and ground line terminal lead pins, respectively, of the particular device chosen, adapting the base board to any one of a variety of different devices.Type: GrantFiled: May 23, 1994Date of Patent: January 2, 1996Assignee: Kel CorporationInventor: Hiroshi Arisaka
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Patent number: 5316486Abstract: A film circuit connector in which respective conductive tracks in film contact areas on front, mating faces are pressed together into electrical connection between side walls of a metal channel-section receptacle spring and a compressible elastomeric plug spring which engage respective rear faces of the films, the compressible plug spring providing a counter-force to the receptacle spring force, accommodating any variations in receptacle spring force arising longitudinally thereof, ensuring constant contact force between all tracks. Tabs for anchoring and grounding the receptacle spring to the circuit board are struck out and bent down from opposite walls of the receptacle spring, enabling electrical shielding of contact areas. Linking portions of conductive tracks connecting the mating contact portions on the front face of the film to board connecting portions, are formed on the rear face of the film for electrical and mechanical protection and may be insulated on all sides.Type: GrantFiled: June 16, 1992Date of Patent: May 31, 1994Assignee: KEL CorporationInventors: Mitsuho Tanaka, Akira Katsumata, Hiroshi Arisaka
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Patent number: 5213521Abstract: A high frequency electrical connector assembly comprises first and second intermatable connectors including first and second intermatable housings, respectively, containing first and second board assemblies each comprising a series of conductive and insulating dielectric layers located alternately in overlying relation and extending transversely of a mating direction. Intermatable ground contacts extend between and interconnect all the conductive layers of respective board assemblies thereby forming ground planes, and, a first and second series of signal contacts having intermatable portions and anchoring portions extending through the respective board assemblies. The respective conductive layers extend to locations adjacent and spaced from the anchoring portions so that mating portions of the connector assembly are shieldingly enclosed between the board assemblies when the connectors are mated. The ground contacts are mating pin and socket portions or intermatable metal portions of the respective housings.Type: GrantFiled: January 22, 1992Date of Patent: May 25, 1993Assignee: Kel CorporationInventor: Hiroshi Arisaka
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Patent number: 5156553Abstract: A film circuit connector assembly comprises matable housing assemblies each including an outer insulating housing receiving a film circuit supporting member carrying a film circuit with a mating contact area therein extending away from a mating face along a film circuit supporting wall with a circuit board engaging area of the film circuit extending out from a base of the housing assembly. A cylindrical spring is mounted in a recess extending along at least one film supporting wall in engagement with a rear face of a contact area pressing the contact areas of the mating connectors together. In one example, the housing assembly clamps free ends of the film circuit conductors in resiliently deformed condition into engagement with the circuit board.Type: GrantFiled: April 22, 1991Date of Patent: October 20, 1992Assignee: Kel CorporationInventors: Akira Katsumata, Hiroshi Arisaka
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Patent number: 5102352Abstract: A high frequency electrical connector for an integrated circuit such as a microprocessor comprises a board assembly comprising a series of conductive and insulating layers of preselected thicknesses arranged alternately, one on top of the other, with conductive layers adjacent front and rear faces. Ground and current source pins are implanted in the layers with connecting portions for external circuitry outstanding from at least one of the faces and with conductive layer contacting portions establishing electrical connection with selected conductive layers. Ground pins connect the conductive layers adjacent the front and rear faces providing front and rear ground shield layers. The layers may be corrugated providing shielding portions extending in the direction of the pins. The thicknesses of the layers and the separation of the pins are preselected to provide pin impedances matching those of other connecting devices.Type: GrantFiled: January 17, 1991Date of Patent: April 7, 1992Assignee: Kel CorporationInventor: Hiroshi Arisaka