Patents by Inventor Hiroshi Hayaoka

Hiroshi Hayaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9083384
    Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 14, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi Sakuragi, Hiroshi Hayaoka, Takayuki Takeuchi
  • Patent number: 8415836
    Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: April 9, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Atsushi Sakuragi, Hiroshi Hayaoka, Takayuki Takeuchi
  • Publication number: 20120248894
    Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 4, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Atsushi SAKURAGI, Hiroshi Hayaoka, Takayuki Takeuchi
  • Publication number: 20100327662
    Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.
    Type: Application
    Filed: July 1, 2008
    Publication date: December 30, 2010
    Inventors: Atsushi Sakuragi, Hiroshi Hayaoka, Takayuki Takeuchi