Abstract: A method for fabricating a semiconductor device comprises the steps of forming a depression on a substrate, bonding a plate of a single crystal semiconductor material on the substrate to establish a contact such that a closed space is formed in the substrate in correspondence to the depression, reducing the thickness of the plate, forming a penetrating opening through the plate in communication to the space to form a bridging part in the plate as a region left from the formation of the penetrating opening, forming an insulation film to cover at least a lower major surface and both side walls of the bridging part, filling the space by depositing polysilicon through the penetrating opening, providing a conductivity to the polysilicon that fills the space, removing the polysilicon that has been deposited on the upper surface of the bridging part to expose a crystal surface of the semiconductor material forming the plate, and forming an active device on the bridging part.

Abstract: A clock signal having a predetermined frequency output from a clock generator and a signal output from a voltage controlled oscillator (VCO) and supplied through a frequency divider are supplied to a phase detector. An output from the phase detector is supplied to a loop filter. The loop filter supplies a voltage in accordance with an output from the phase detector to a first control voltage terminal of the VCO and to a phase lock-in circuit. The phase lock-in circuit supplies a voltage in accordance with an output voltage from the loop filter to a second control voltage terminal of the VCO. In the VCO, the sensitivity of the first control voltage terminal is lower than that of the second control voltage terminal, i.e., a rate of change in ouput frequency with respect to a change in second control voltage is higher than that of the first control voltage. A phase lock detector for detecting whether or not the PLL apparatus is set in a phase-locked state is also connected to the phase lock-in circuit.

Abstract: A semiconductor device with an electrode wiring layer including an upper conductive layer and, interspaced with a barrier layer used for reaction prevention, a lower conductive layer contacting an active region. The barrier layer consists of an insulating film having a thickness thin enough for flow of a tunnel current.

Abstract: A bipolar or MOS semiconductor device is produced by self-alignment by (a) forming an insulating film on a semiconductor substrate, (b) forming a first conductive film, on the semiconductor substrate and (c) forming a first masking film having a window. The conductive film is then (d) anisotropically etched to form an opening and then, (e) transversely etched to form a protruding portion of the first masking film. A second masking film is (f) forming a second masking film on the insulating film through the window, (g) an uncovered portion of the insulating film under the protruding portion, is etched and (h) a second conductive film connecting the first conductive film and the exposed portion of the semiconductor substrate is formed.