Patents by Inventor Hiroshi Ise

Hiroshi Ise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8581368
    Abstract: A semiconductor wafer having a plurality of interconnect layers, includes a plurality of chip-composing portions, a dicing region separating the chip-composing portions from each other, and a plurality of inter-chip interconnects formed in the dicing region and electrically connecting adjacent ones of the chip-composing portions, wherein each of the inter-chip interconnects has a width of an intermediate portion narrower than widths of connection end portions connected to the adjacent ones of the chip-composing portions.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: November 12, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Yoshitsugu Kawashima, Hiroshi Ise
  • Publication number: 20120187573
    Abstract: A semiconductor wafer having a plurality of interconnect layers, includes a plurality of chip-composing portions, a dicing region separating the chip-composing portions from each other, and a plurality of inter-chip interconnects formed in the dicing region and electrically connecting adjacent ones of the chip-composing portions, wherein each of the inter-chip interconnects has a width of an intermediate portion narrower than widths of connection end portions connected to the adjacent ones of the chip-composing portions.
    Type: Application
    Filed: April 3, 2012
    Publication date: July 26, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi UCHIDA, Yoshitsugu Kawashima, Hiroshi Ise
  • Patent number: 8193038
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor wafer including a plurality of interconnect layers, the semiconductor wafer including: a plurality of chip-composing portions; a dicing region separating the chip-composing portions from each other; and a plurality of inter-chip interconnects formed in the dicing region and electrically connecting adjacent ones of the chip-composing portions; and forming semiconductor chips by dicing the dicing region so as to divide the chip-composing portions, wherein each of the inter-chip interconnects has a width of an intermediate portion narrower than widths of connection end portions connected to the adjacent ones of the chip-composing portions.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: June 5, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Yoshitsugu Kawashima, Hiroshi Ise
  • Patent number: 8158505
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor wafer including a plurality of interconnect layers, the semiconductor wafer including: a plurality of chip-composing portions; a dicing region separating the chip-composing portions from each other; and a plurality of inter-chip interconnects electrically connecting adjacent ones of the chip-composing portions and formed in one of the interconnect layers and in the dicing region; a dummy metal pattern comprising a plurality of dummy metals, the dummy metal pattern being formed in at least one of the interconnect layers over or below the inter-chip interconnects only in an area corresponded to a region where the inter-chip interconnects are arranged and corresponded to a region therearound; and forming semiconductor chips by dicing the dicing region so as to divide the chip-composing portions.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: April 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Yoshitsugu Kawashima, Hiroshi Ise
  • Publication number: 20100320611
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor wafer including a plurality of interconnect layers, the semiconductor wafer including: a plurality of chip-composing portions; a dicing region separating the chip-composing portions from each other; and a plurality of inter-chip interconnects electrically connecting adjacent ones of the chip-composing portions and formed in one of the interconnect layers and in the dicing region; a dummy metal pattern comprising a plurality of dummy metals, the dummy metal pattern being formed in at least one of the interconnect layers over or below the inter-chip interconnects only in an area corresponded to a region where the inter-chip interconnects are arranged and corresponded to a region therearound; and forming semiconductor chips by dicing the dicing region so as to divide the chip-composing portions.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 23, 2010
    Applicant: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Yoshitsugu Kawashima, Hiroshi Ise
  • Publication number: 20100320612
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor wafer including a plurality of interconnect layers, the semiconductor wafer including: a plurality of chip-composing portions; a dicing region separating the chip-composing portions from each other; and a plurality of inter-chip interconnects formed in the dicing region and electrically connecting adjacent ones of the chip-composing portions; and forming semiconductor chips by dicing the dicing region so as to divide the chip-composing portions, wherein each of the inter-chip interconnects has a width of an intermediate portion narrower than widths of connection end portions connected to the adjacent ones of the chip-composing portions.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 23, 2010
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Uchida, Yoshitsugu Kawashima, Hiroshi Ise
  • Patent number: 6491857
    Abstract: A semiconductor chip mounted on a lead frame is sealed in a synthetic resin package through a molding process, and pressure is applied to synthetic resin softened from granular. synthetic resin so as to evacuate the air from the synthetic resin before injecting the synthetic resin into cavities formed in a molding die, thereby preventing the synthetic resin package from void.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: December 10, 2002
    Assignee: NEC Corporation
    Inventor: Hiroshi Ise
  • Publication number: 20010003385
    Abstract: A semiconductor chip mounted on a lead frame is sealed in a synthetic resin package through a molding process, and pressure is applied to synthetic resin softened from granular synthetic resin so as to evacuate the air from the synthetic resin before injecting the synthetic resin into cavities formed in a molding die, thereby preventing the synthetic resin package from void.
    Type: Application
    Filed: January 13, 1998
    Publication date: June 14, 2001
    Inventor: HIROSHI ISE
  • Patent number: 6180435
    Abstract: Semiconductor chips are arranged on a panel in matrix, scaled in a piece of synthetic resin through a transfer molding, and the resultant structure is separated into dices through a cutting operation so that small semiconductor devices are economically produced.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: January 30, 2001
    Assignee: NEC Corporation
    Inventors: Hiroshi Ise, Toshiaki Shironouchi
  • Patent number: 5356283
    Abstract: A metal mold for sealing a semiconductor device with a resin and including a shutter gate mechanism. The mold drives a shutter gate pin by using the ejection stroke of a conventional seal press, and therefore eliminates the need for an extra drive source. It follows that the mold can be implemented only if an existing facility is slightly modified, and it is lower in cost than conventional metal molds.
    Type: Grant
    Filed: October 14, 1993
    Date of Patent: October 18, 1994
    Assignee: NEC Corporation
    Inventors: Makoto Hamada, Hiroshi Ise
  • Patent number: 5093426
    Abstract: A hydrogenated copolymer rubber which is a hydrogenation product of a random copolymer rubber consisting of:(A) 30-70 mole % of a unit derived from at least one monomer selected from the group consisting of alkyl acrylates and alkoxy-substituted alkyl acrylates,(B) 20-70 mole % of a unit derived from at least one conjugated diene, and(C) 0-10 mole % of a unit derived from at least one other ethylenically unsaturated compound copolymerizable with the components (A) and (B) [(A)+(B)+(C)=100 mole %] wherein at least 90% of the double bonds of the conjugated diene unit is hydrogenated; a crosslinkable rubber composition comprising said hydrogenated copolymer rubber and a crosslinking agent; and a thermoplastic polymer comprising said hydrogenated copolymer rubber and a thermoplastic resin. These rubbers and compositions are superior in low-temperature resistance, heat resistance, ozone resistance, mechanical strengths, compression set, impact resilience and oil resistance.
    Type: Grant
    Filed: October 19, 1989
    Date of Patent: March 3, 1992
    Assignee: Japan Synthetic Rubber Co., Ltd.
    Inventors: Nobuyuki Sakabe, Toshio Ohhara, Toshio Miyabayashi, Hiroshi Ise
  • Patent number: 4997457
    Abstract: A solid gelled fuel for producing a visible flame of various colors, which contains methyl alcohol as a primary ingredient in a solid gel with the addition of dibenzylidene sorbitol, cellulose ester and ethylene glycol, with a flame coloring compound being suspended in the solid.
    Type: Grant
    Filed: January 9, 1990
    Date of Patent: March 5, 1991
    Assignee: Yugen Kaisha Gunma Kakoh Seizosho
    Inventors: Tomochiyo Mitsusawa, Hiroshi Ise
  • Patent number: 4912186
    Abstract: An acrylic rubber obtainable by copolymerizing a monomer mixture of:(A) 70 to 99.99% by weight of at least one compound selected from the group consisting of alkyl acrylates and alkoxyalkyl acrylates,(B) 0.01 to 10% by weight of at least one compound represented by the general formula: ##STR1## wherein R.sup.1 is a hydrogen atom or a methyl group; X is a hydrogen atom, --COOR.sup.6 (R.sup.6 is an alkyl group having 1-10 carbon atoms or an alkoxyalkyl group having 2-14 carbon atoms), or ##STR2## R.sup.2, R.sup.3 and R.sup.4 are independently hydrogen atoms or groups having 1-10 carbon atoms whose carbon atom adjacent to C.dbd.C has no hydrogen; R.sup.5 is a group having 1-10 carbon atoms whose carbon atom adjacent to C.dbd.C has no hydrogen; Y is ##STR3## or --O--; and n is 1 or 0, and (C) 0-20% by weight of at least one compound selected from the group consisting of other unsaturated compounds of the vinyl type, vinylidene type and vinylene type, in the presence of a radical polymerization initiator.
    Type: Grant
    Filed: August 25, 1988
    Date of Patent: March 27, 1990
    Assignee: Japan Synthetic Rubber Co., Ltd.
    Inventors: Toshio Ohhara, Yukihiro Sawada, Hiroshi Ise, Toshio Miyabayashi, Hiroji Enyo, Hozumi Sato
  • Patent number: 4892351
    Abstract: In a sunroof structure having an opening provided in a roof panel of an automobile, a sunroof panel which can move between a first position for closing the opening and a second position for exposing the opening, a sunroof base panel supporting a mechanism for achieving the motion of the sunroof panel, and a water drain trough defined along a peripheral region of the opening, the water drain trough is defined by a trough member having a substantially U-shaped cross section extending along the peripheral region of the opening and resting upon an inner surface of an outer wall of the sunroof base panel and an outer surface of a guide rail for the sunroof panel. Preferably, the trough member consists of an extension of a seal member which is interposed between a lower surface of the roof panel and an upper most edge of the outer wall of the sunroof base panel. Thus, the trough member is not required to be rigid and the assembly work is simplified.
    Type: Grant
    Filed: February 23, 1988
    Date of Patent: January 9, 1990
    Assignee: Honda Giken Kogyo K.K.
    Inventors: Jun Ono, Yuichiro Iso, Hiroshi Ise