Patents by Inventor Hiroshi Kaneta
Hiroshi Kaneta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160258908Abstract: A method for evaluating atomic vacancies in a silicon wafer surface layer includes: element formation in which a pair of comb-shaped electrodes are formed on the same surface of a silicon sample over piezoelectric thin films; detection during which the sample is cooled and an ultrasonic pulse generated from one electrode while an external magnetic field is applied, the ultrasonic pulse being propagated through the sample surface and received by the other electrode, and a phase difference being detected between the ultrasonic pulse generated by the one electrode and the ultrasonic pulse received by the other electrode; and evaluation during which the sample surface elastic constant is determined on the basis of the phase difference, and the atomic vacancies in the sample surface are evaluated on the basis of changes in the elastic constant according to temperature or changes in the elastic constant according to the magnetic field intensity.Type: ApplicationFiled: November 5, 2014Publication date: September 8, 2016Applicant: NIIGATA UNIVERSITYInventors: Terutaka GOTO, Yuichi NEMOTO, Hiroshi KANETA, Mitsuhiro AKATSU, Keisuke MITSUMOTO
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Patent number: 8578777Abstract: A quantitative evaluation method, a method for manufacturing a silicon wafer, and a silicon wafer manufactured by the method, enabling more efficient evaluation of the concentration of atomic vacancies existing in a silicon wafer. The quantitative evaluation method includes steps of: oscillating, in a state in which an external magnetic field is applied to a silicon wafer (26) while keeping the silicon wafer (26) at a constant temperature, an ultrasonic wave pulse and receiving a measurement wave pulse obtained after the ultrasonic wave pulse is propagated through the silicon wafer (26) for detecting a phase difference between the ultrasonic wave pulse and the measurement wave pulse; and calculating an elastic constant from the phase difference. The external magnetic field is changed to calculate the elastic constant corresponding to a change in the external magnetic field for evaluating a concentration of atomic vacancies in the silicon wafer (26).Type: GrantFiled: August 19, 2010Date of Patent: November 12, 2013Assignee: Niigata UniverasityInventors: Terutaka Goto, Hiroshi Kaneta, Yuichi Nemoto, Mitsuhiro Akatsu
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Patent number: 8215175Abstract: A quantitative evaluation device and method of an atomic vacancy, which are capable of efficiently and quantitatively evaluating an atomic vacancy existing in a silicon wafer. A quantitative evaluation device 1 is equipped with a detector 5 including an ultrasonic generator 27 and an ultrasonic receiver 28, a silicon sample 6 formed with the ultrasonic generator 27 and the ultrasonic receiver 28 on a silicon wafer 26 comprising perfect crystal silicon, a magnetic force generator 4 for applying an external magnetic field to the silicon sample 6, and a cooler 3 capable of cooling and controlling the silicon sample 6 to a range of temperatures lower than or equal to 50K.Type: GrantFiled: July 2, 2008Date of Patent: July 10, 2012Assignee: Niigata UniversityInventors: Terutaka Goto, Hiroshi Kaneta, Yuichi Nemoto
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Publication number: 20120168912Abstract: A quantitative evaluation method, a method for manufacturing a silicon wafer, and a silicon wafer manufactured by the method, enabling more efficient evaluation of the concentration of atomic vacancies existing in a silicon wafer. The quantitative evaluation method includes steps of: oscillating, in a state in which an external magnetic field is applied to a silicon wafer (26) while keeping the silicon wafer (26) at a constant temperature, an ultrasonic wave pulse and receiving a measurement wave pulse obtained after the ultrasonic wave pulse is propagated through the silicon wafer (26) for detecting a phase difference between the ultrasonic wave pulse and the measurement wave pulse; and calculating an elastic constant from the phase difference. The external magnetic field is changed to calculate the elastic constant corresponding to a change in the external magnetic field for evaluating a concentration of atomic vacancies in the silicon wafer (26).Type: ApplicationFiled: August 19, 2010Publication date: July 5, 2012Applicant: Niigata UniversityInventors: Terutaka Goto, Hiroshi Kaneta, Yuichi Nemoto, Mitsuhiro Akatsu
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Publication number: 20110256444Abstract: A secondary battery in which temperature rise (heat generation) can be measured accurately at the time of quick charge/discharge, and a battery which can be configured readily using the secondary batteries while realizing low resistance. Separately from the positive and negative electrode terminals of a flat laminate film secondary battery, a third terminal is fixed perpendicularly thereto. The third terminal is connected with the electrode current collecting parts of a power generating element body constituting the secondary battery (1) and imparted with a potential equal to that of any one of the positive and negative electrode terminals. Inner temperature of the secondary battery is determined by measuring the temperature of the third terminal and a cell balancer circuit, or the like, is connected with the third terminal. The battery is configured by connecting the positive and negative electrode terminals directly in series.Type: ApplicationFiled: June 23, 2011Publication date: October 20, 2011Applicant: NEC CORPORATIONInventors: Hiroshi KANETA, Chika KANBE
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Patent number: 8037761Abstract: There is provided a quantitative evaluation device or the like of atomic vacancy existing in a silicon wafer in which the atomic vacancy concentration in the silicon wafer can be quantitatively evaluated by forming a rationalized thin-film transducer on a surface of a silicon sample without conducting an acceleration treatment for enhancing the concentration.Type: GrantFiled: March 2, 2007Date of Patent: October 18, 2011Assignees: Niigata University, Sumco CorporationInventors: Terutaka Goto, Yuichi Nemoto, Hiroshi Kaneta, Masataka Hourai
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Patent number: 8017260Abstract: A secondary battery in which temperature rise (heat generation) can be measured accurately at the time of quick charge/discharge, and a battery which can be configured readily using the secondary batteries while realizing low resistance. Separately from the positive and negative electrode terminals of a flat laminate film secondary battery, a third terminal is fixed perpendicularly thereto. The third terminal is connected with the electrode current collecting parts of a power generating element body constituting the secondary battery (1) and imparted with a potential equal to that of any one of the positive and negative electrode terminals. Inner temperature of the secondary battery is determined by measuring the temperature of the third terminal and a cell balancer circuit, or the like, is connected with the third terminal. The battery is configured by connecting the positive and negative electrode terminals directly in series.Type: GrantFiled: April 23, 2003Date of Patent: September 13, 2011Assignee: NEC CorporationInventors: Hiroshi Kaneta, Chika Kanbe
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Patent number: 7906443Abstract: A wafer processing method is provided that includes the steps of heating a silicon wafer containing oxygen and irradiating an infrared ray having a wavelength within a range of 7-25 ?m on the silicon wafer, and controlling formation of oxygen precipitates within the silicon wafer by selectively setting a heating temperature for heating the silicon wafer and an irradiation intensity of the infrared ray.Type: GrantFiled: May 26, 2006Date of Patent: March 15, 2011Assignee: Fujitsu LimitedInventors: Katsuto Tanahashi, Hiroshi Kaneta
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Publication number: 20100186512Abstract: A quantitative evaluation device and method of an atomic vacancy, which are capable of efficiently and quantitatively evaluating an atomic vacancy existing in a silicon wafer. A quantitative evaluation device 1 is equipped with a detector 5 including an ultrasonic generator 27 and an ultrasonic receiver 28, a silicon sample 6 formed with the ultrasonic generator 27 and the ultrasonic receiver 28 on a silicon wafer 26 comprising perfect crystal silicon, a magnetic force generator 4 for applying an external magnetic field to the silicon sample 6, and a cooler 3 capable of cooling and controlling the silicon sample 6 to a range of temperatures lower than or equal to 50K.Type: ApplicationFiled: July 2, 2008Publication date: July 29, 2010Applicant: Niigata UniversityInventors: Terutaka Goto, Hiroshi Kaneta, Yuichi Nemoto
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Patent number: 7700227Abstract: A flat secondary battery having a fusion-bonded sealing type laminate film as an armored body tends to be inferior in sealing reliability to a flat secondary battery having a welded sealing type can as an armored body, due to a difference in sealing method between the two batteries. Therefore, there has been a large challenge of finding the way to make the sealing reliability of the laminate film secondary battery closer to that of the can type secondary battery. The sealing reliability is improved by further increasing a sealing force without taking any measure to the existing laminate film secondary battery, in such a manner that the fusion bonding area of the existing laminate film secondary battery is sandwiched from upside and downside to be cramped from outside so as to mechanically add a sealing force from outside to the sealing force of the laminate film itself.Type: GrantFiled: July 21, 2008Date of Patent: April 20, 2010Assignee: NEC CorporationInventor: Hiroshi Kaneta
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Publication number: 20090217866Abstract: A Si single crystal having no defect region is stably grown by clearly detecting a type of a defect region or a defect free region of Si single crystal grown at a certain pulling rate profile and feeding back the data to the subsequent pulling. In the production of Si single crystal ingot by a CZ method, a concentration distribution of atomic vacancy in a cross-section of a precedent grown Si single crystal is detected by the direct observation method of atomic vacancy and then fed back to the subsequent pulling treatment to adjust a pulling rate profile of the subsequent pulling.Type: ApplicationFiled: March 2, 2007Publication date: September 3, 2009Applicants: SUMCO CORPORATION, NIIGATA UNIVERSITYInventors: Terutaka Goto, Yuichi Nemoto, Hiroshi Kaneta, Masataka Hourai
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Publication number: 20090064786Abstract: There is provided a quantitative evaluation device or the like of atomic vacancy existing in a silicon wafer in which the atomic vacancy concentration in the silicon wafer can be quantitatively evaluated by forming a rationalized thin-film transducer on a surface of a silicon sample without conducting an acceleration treatment for enhancing the concentration.Type: ApplicationFiled: March 2, 2007Publication date: March 12, 2009Applicants: Sumco Corporation, Niigata UniversityInventors: Terutaka Goto, Yuichi Nemoto, Hiroshi Kaneta, Masataka Hourai
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Publication number: 20080280199Abstract: A flat secondary battery having a fusion-bonded sealing type laminate film as an armored body tends to be inferior in sealing reliability to a flat secondary battery having a welded sealing type can as an armored body, due to a difference in sealing method between the two batteries. Therefore, there has been a large challenge of finding the way to make the sealing reliability of the laminate film secondary battery closer to that of the can type secondary battery. The sealing reliability is improved by further increasing a sealing force without taking any measure to the existing laminate film secondary battery, in such a manner that the fusion bonding area of the existing laminate film secondary battery is sandwiched from upside and downside to be cramped from outside so as to mechanically add a sealing force from outside to the sealing force of the laminate film itself.Type: ApplicationFiled: July 21, 2008Publication date: November 13, 2008Applicant: NEC CORPORATIONInventor: Hiroshi Kaneta
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Publication number: 20070190809Abstract: A wafer processing method is provided that includes the steps of heating a silicon wafer containing oxygen and irradiating an infrared ray having a wavelength within a range of 7-25 ?m on the silicon wafer, and controlling formation of oxygen precipitates within the silicon wafer by selectively setting a heating temperature for heating the silicon wafer and an irradiation intensity of the infrared ray.Type: ApplicationFiled: May 26, 2006Publication date: August 16, 2007Applicant: FUJITSU LIMITEDInventors: Katsuto Tanahashi, Hiroshi Kaneta
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Publication number: 20060188777Abstract: A lithium ion secondary battery comprising a battery element obtained by alternately stacking a plurality of positive electrodes having layers of a positive electrode active material formed on both sides of positive current collectors and a plurality of negative electrodes having layers of a negative electrode active material formed on both sides of negative current collectors through separators in such a way that the positive electrode active material layers face the negative electrode active material layers, the battery element impregnated with liquid electrolyte and held by a laminate case, the lithium ion secondary battery having a 10-second output value of 3000 W/kg or above at a depth of discharge capacity of 50% and 25° C and having the following configuration in which: (1) the positive electrode active material has an average particle size of 3 to 10 ?m and the positive electrode excluding the current collector has a thickness of 30 to 110 ?m, (2) the negative electrode active material has an averageType: ApplicationFiled: July 23, 2004Publication date: August 24, 2006Inventor: Hiroshi Kaneta
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Patent number: 7087344Abstract: A battery module includes a battery cell having a laminate overcoat, a pair of rubber sheets, a pair of pressure plates, and a pair of housing members from the internal to the external of the battery module. An intervention member including four poles is interposed between the pressure plate and the housing member at the central area of the battery cell to alleviate the stress concentration on the peripheral area of the battery cell. The intervention member may be formed separately from or integrated with the pressure plate.Type: GrantFiled: December 26, 2002Date of Patent: August 8, 2006Assignee: NEC CorporationInventor: Hiroshi Kaneta
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Patent number: 7029789Abstract: The battery is constituted to satisfy B/A?0.57, wherein “A” represents a width of an active material region and “B” represents a width of each electrode terminal.Type: GrantFiled: January 28, 2003Date of Patent: April 18, 2006Assignee: NEC CorporationInventor: Hiroshi Kaneta
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Publication number: 20050130037Abstract: A secondary battery in which temperature rise (heat generation) can be measured accurately at the time of quick charge/discharge, and a battery which can be configured readily using the secondary batteries while realizing low resistance. Separately from the positive and negative electrode terminals of a flat laminate film secondary battery, a third terminal is fixed perpendicularly thereto. The third terminal is connected with the electrode current collecting parts of a power generating element body constituting the secondary battery (1) and imparted with a potential equal to that of any one of the positive and negative electrode terminals. Inner temperature of the secondary battery is determined by measuring the temperature of the third terminal and a cell balancer circuit, or the like, is connected with the third terminal. The battery is configured by connecting the positive and negative electrode terminals directly in series.Type: ApplicationFiled: April 23, 2003Publication date: June 16, 2005Applicant: NEC CorporationInventors: Hiroshi Kaneta, Chika Kanre
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Publication number: 20050042511Abstract: A flat secondary battery having a fusion-bonded sealing type laminate film as an armored body tends to be inferior in sealing reliability to a flat secondary battery having a welded sealing type can as an armored body, due to a difference in sealing method between the two batteries. Therefore, there has been a large challenge of finding the way to make the sealing reliability of the laminate film secondary battery closer to that of the can type secondary battery. The sealing reliability is improved by further increasing a sealing force without taking any measure to the existing laminate film secondary battery, in such a manner that the fusion bonding area of the existing laminate film secondary battery is sandwiched from upside and downside to be cramped from outside so as to mechanically add a sealing force from outside to the sealing force of the laminate film itself.Type: ApplicationFiled: September 30, 2004Publication date: February 24, 2005Inventor: Hiroshi Kaneta
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Publication number: 20040135208Abstract: A semiconductor substrate of the present invention is a DSP wafer or Semi-DSP wafer (FIG. 2) having a flatness of an SFQR value ≦70 (nm) and containing boron at a concentration not lower than 5×1016 (atoms/cm3) nor higher than 2×1017 (atoms/cm3) within 95% or more of rectangular regions of 25×8 (mm2) arranged on a front face of the substrate. Specifically, a silicon crystal layer by an epitaxial growth is formed on a front face of a silicon substrate having the above substrate boron concentration.Type: ApplicationFiled: December 24, 2003Publication date: July 15, 2004Applicant: FUJITSU LIMITEDInventors: Katsuto Tanahashi, Hiroshi Kaneta, Tetsuo Fukuda