Patents by Inventor Hiroshi Kimura

Hiroshi Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10596870
    Abstract: Method of manufacturing a vehicular arm component having a particular torsional rigidity and a sufficient tensile strength. Method of manufacturing a vehicular arm component 1 having a hollow shape in open cross-section by subjecting workpiece W, which is a flat plate, extending in an XY plane to pressing in stages such that two side surfaces W1, W2 of the workpiece in an XZ plane formed by the X direction and a Z direction face one another across a gap G, the method including a restriking process in which a protrusion 113 disposed on a restriking die 110 to be extended in the X direction is arranged in the gap between the two side surfaces facing one another and the two side surfaces are brought into contact with the protrusion such that the workpiece is pressed from an outer periphery to an inner periphery.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: March 24, 2020
    Assignee: Yorozu Corporation
    Inventors: Hiroshi Kimura, Masaharu Matsumoto, Junichi Seki, Tomo Tsuchida
  • Publication number: 20200010853
    Abstract: A method is provided for integrating a DNA fragment of a desired base sequence into a site located adjacent to a binding region of a DNA-binding protein bound to a DNA molecule, the method including bringing the DNA fragment having a base sequence including a transposase-binding sequence and the desired base sequence close to the binding region using a specific binding substance to the DNA-binding protein, binding transposase to the transposase-binding sequence, and activating the transposase such that the DNA fragment of the desired base sequence is integrated into the site located adjacent to the binding region.
    Type: Application
    Filed: May 24, 2017
    Publication date: January 9, 2020
    Inventors: Yasuyuki Ohkawa, Akihito Harada, Hitoshi Kurumizaka, Hiroshi Kimura, Tetsuya Handa, Yuko Sato, Yoko Hayashi
  • Publication number: 20200002947
    Abstract: A split wedge body, which has a curved inner surface, is formed gradually thicker from a tip portion to a terminal end portion thereof, and is made to cover the outer peripheral surface of a CFRP cable to thereby enclose the outer peripheral surface of the CFRP cable over a prescribed length thereof. A gap extending in the longitudinal direction is assured between end faces that oppose each other when a plurality of the split wedge bodies are arranged on the outer peripheral surface of the CFRP cable. The gap has an inclined portion that runs along a valley of the CFRP cable enclosed by the split wedge bodies.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Applicants: TOKYO ROPE MANUFACTURING CO., LTD., HINODE, LTD.
    Inventors: Shunji HACHISUKA, Hiroshi KIMURA, Daisuke MANABE, Hiroyuki SHIMMURA, Yukio KITADA, Ryo YAMASHITA
  • Publication number: 20190289950
    Abstract: an information processing method in which an electronic device embedded in footwear or attached to the footwear. The footwear having a communicator configured to communicate with one or more external terminals executes an authentication step of authenticating, whether or not a user wearing the footwear is an authorized user, an acquisition step of acquiring at least a payment request of a reward for the user wearing the footwear from the one or more external terminals via the communicator when the authentication has succeeded, an acceptance step of accepting the acquired payment request in accordance with a prescribed action performed by the user, and a transmission step of transmitting an acceptance result to the one or more external terminals via the communicator.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 26, 2019
    Inventors: Tetsuya Matsumoto, Toshihiro Yamaguchi, Kazuyuki Kosei, Kota Yamanaka, Hiroshi Kimura, Hiroki Yoshino, Susumu Iwamoto
  • Publication number: 20190286043
    Abstract: An image forming apparatus includes: an inverting unit that inverts a sheet when an image forming process for forming images on both sides of the sheet is performed; an image forming unit that forms an image on a second side of the sheet based on first side image data and forms an image on a third side of the sheet based on second side image data; a controller that starts the image forming process upon receiving print data to be printed on specific paper, and inverts a sheet fed from a sheet feeding unit once or more; and a converting unit that, when the sheet fed from the sheet feeding unit is the specific paper, converts the first side print data which is received to be printed on the specific paper into N-th side image data where N?2 and transfers the N-th side image data to the image forming unit.
    Type: Application
    Filed: December 7, 2018
    Publication date: September 19, 2019
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Hirooki OKA, Tetsuo HARA, Joji SAITO, Haruhiko KOJIMA, Hiroshi KIMURA
  • Patent number: 10377964
    Abstract: The invention provides a magneto-rheological grease composition which contains (a) a base oil including at least 30% by mass of an ether type synthetic oil; (b) an aliphatic diurea thickener; and (c) magnetic particles in an amount of 45 to 95% by mass based on the total mass of the composition. The magneto-rheological grease composition can show superior thermal stability, dispersion stability and magneto-rheological properties.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: August 13, 2019
    Assignees: KYODO YUSHI CO., LTD., YOKOHAMA NATIONAL UNIVERSITY
    Inventors: Hiroshi Kimura, Shinya Kondo, Tetsuo Ogawa, Makoto Hayama, Koji Maesaka, Shin Morishita, Ken Nakano, Toshihiko Shiraishi
  • Patent number: 10382234
    Abstract: To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: August 13, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Hiroshi Kimura, Haoqiong Chen, Yehui Sun
  • Publication number: 20190158322
    Abstract: To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.
    Type: Application
    Filed: January 17, 2019
    Publication date: May 23, 2019
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Hiroshi KIMURA, Haoqiong CHEN, Yehui SUN
  • Patent number: 10298890
    Abstract: A vehicle display device includes a projector which emits display light of an image indicating vehicle information, a controller that controls luminance of the display light, and a screen that displays the image when the display light is projected to the screen. The screen has a convex portion that protrudes to a near side in a direction in which the image is visually recognized, and a concave portion that is recessed to a far side. In addition, the controller controls the luminance of the display light so that the display light projected to the convex portion (first parts) has higher luminance than that of the display light projected to the concave portion (second parts).
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: May 21, 2019
    Assignee: DENSO CORPORATION
    Inventors: Kenichiro Karikomi, Keiichi Iwashima, Yoshihisa Hasegawa, Hiroshi Kimura
  • Patent number: 10240661
    Abstract: An end fixing structure of a composite wire rod includes a composite wire rod, a wedge body that is formed into a cylindrical shape with an enlarging diameter from a front end portion, wherein an inner wall surface is formed for engaging with the outer surface of the composite wire rod which is copied onto the inner wall surface, and a sleeve provided on an outer peripheral side of the wedge body and having a conical and hollow inner structure, and the wedge body consists of a plurality of divided wedge bodies, facing each other on their divided surfaces with a space therebetween, and the inner wall surface in the divided wedge body is made of microscopic irregularities, thereby shortening a processing time and maintaining a sufficient gripping power over long term.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: March 26, 2019
    Assignee: TOKYO ROPE MFG. CO., LTD.
    Inventors: Daisuke Manabe, Shunji Hachisuka, Hiroshi Kimura, Fumihiro Matsuda, Nobuhiro Kai, Hiroyuki Shimmura, Kohsuke Ashizuka
  • Publication number: 20190048414
    Abstract: A method for determining a nucleic acid sequence of a target gene expressed in a subject cell, the method including: comprehensively determining mRNA nucleic acid sequences in the subject cell, and identifying a nucleic acid sequence having a nucleic acid sequence of a portion of the target gene, from among the determined mRNA nucleic acid sequences, in which the identified nucleic acid sequence is a nucleic acid sequence of the target gene.
    Type: Application
    Filed: March 2, 2017
    Publication date: February 14, 2019
    Inventors: Yasuyuki OHKAWA, Kazumitsu MAEHARA, Hiroshi KIMURA, Yuko SATO
  • Patent number: 10193714
    Abstract: To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: January 29, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Hiroshi Kimura, Haoqiong Chen, Yehui Sun
  • Patent number: 10074740
    Abstract: To enhance electromigration resistance of an electrode. A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode is integrated with the drain pad and extends from the side surface of the drain pad in a first direction (y direction). A recessed portion is located in a region overlapping with the drain electrode in a plan view. At least a part of the drain electrode is buried in the recessed portion. A side surface of the recessed portion, which faces the drain pad, enters the drain pad in the first direction (y direction).
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: September 11, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Hideaki Tsuchiya, Hiroshi Kimura, Takashi Ide, Yorinobu Kunimune
  • Publication number: 20180234270
    Abstract: To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.
    Type: Application
    Filed: February 16, 2017
    Publication date: August 16, 2018
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Hiroshi KIMURA, Haoqiong Chen, Yehui Sun
  • Patent number: 9996099
    Abstract: Disclosed herein is a bias generator circuit for generating a desired bias voltage or bias current using a simple configuration. The bias generator circuit includes a voltage generator circuit, a comparator, and a clock gating circuit. The voltage generator circuit increases or decreases its output voltage in accordance with the number of clock cycles of a given clock signal. The comparator compares the output voltage of the voltage generator circuit to a reference voltage. The clock gating circuit receives, as a control signal, output of the comparator and determines, in accordance with the control signal, whether or not to pass the clock signal to the voltage generator circuit. Thus, the output voltage of the voltage generator circuit, i.e., a bias voltage, is set to be close to the reference voltage.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: June 12, 2018
    Assignee: Socionext, Inc.
    Inventor: Hiroshi Kimura
  • Patent number: D821857
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: July 3, 2018
    Assignee: TOKYO ROPE MFG. CO., LTD.
    Inventors: Daisuke Manabe, Shunji Hachisuka, Hiroshi Kimura, Fumihiro Matsuda, Kohsuke Ashiduka
  • Patent number: D823676
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: July 24, 2018
    Assignee: TOKYO ROPE MFG. CO., LTD.
    Inventors: Daisuke Manabe, Shunji Hachisuka, Hiroshi Kimura, Yoshihiro Tamura
  • Patent number: D825320
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: August 14, 2018
    Assignee: TOKYO ROPE MFG. CO., LTD.
    Inventors: Daisuke Manabe, Shunji Hachisuka, Hiroshi Kimura, Fumihiro Matsuda, Kohsuke Ashiduka
  • Patent number: D826037
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: August 21, 2018
    Assignee: TOKYO ROPE MFG. CO., LTD.
    Inventors: Daisuke Manabe, Shunji Hachisuka, Hiroshi Kimura, Yoshihiro Tamura
  • Patent number: D873116
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: January 21, 2020
    Assignee: TOKYO ROPE MANUFACTURING CO., LTD.
    Inventors: Shunji Hachisuka, Hiroshi Kimura, Daisuke Manabe, Hiroyuki Shimmura, Yukio Kitada, Ryo Yamashita