Patents by Inventor Hiroshi Komorita
Hiroshi Komorita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9356101Abstract: There is provided a polycrystalline aluminum nitride substrate that is effective in growing a GaN crystal. The polycrystalline aluminum nitride base material for use as a substrate material for grain growth of GAN-base semiconductors, contains 1 to 10% by weight of a sintering aid component and has a thermal conductivity of not less than 150 W/m·K, the substrate having a surface free from recesses having a maximum diameter of more than 200 ?m.Type: GrantFiled: September 26, 2011Date of Patent: May 31, 2016Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiroshi Komorita, Noritaka Nakayama, Kentaro Takanami
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Publication number: 20130168692Abstract: There is provided a polycrystalline aluminum nitride substrate that is effective in growing a GaN crystal. The polycrystalline aluminum nitride base material for use as a substrate material for grain growth of GAN-base semiconductors, contains 1 to 10% by weight of a sintering aid component and has a thermal conductivity of not less than 150 W/m·K, the substrate having a surface free from recesses having a maximum diameter of more than 200 ?m.Type: ApplicationFiled: September 26, 2011Publication date: July 4, 2013Applicants: TOSHIBA MATERIALS CO., LTD., KABUSHIKI KAISHA TOSHIBAInventors: Hiroshi Komorita, Noritaka Nakayama, Kentaro Takanami
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Patent number: 7263766Abstract: An insulating substrate (1) has insulative ceramic layers (2, 3) laid one upon another, an intermediate layer (4) made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer (5) joined to the top surface of a top one of the ceramic layers, and a second conductive layer (6) joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.Type: GrantFiled: January 27, 2003Date of Patent: September 4, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Yutaka Ishiwata, Kosoku Nagata, Toshio Shimizu, Hiroyuki Hiramoto, Yasuhiko Taniguchi, Kouji Araki, Hiroshi Fukuyoshi, Hiroshi Komorita
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Patent number: 6784131Abstract: The present invention provides a silicon nitride wear resistant member composed of silicon nitride sintered body containing 1-10 mass % of rare earth element in terms of oxide thereof as sintering agent, wherein a total oxygen content of the silicon nitride sintered body is 6 mass % or less, a porosity of the silicon nitride sintered body is 0.5 vol. % or less, and a maximum size of pore existing in grain boundary phase of the silicon nitride sintered body is 0.3 &mgr;m or less. According to the above structure of the present invention, there can be provided a silicon nitride wear resistant member and a method of manufacturing the member having a high strength and a toughness property, and particularly excellent in sliding characteristics.Type: GrantFiled: January 11, 2002Date of Patent: August 31, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Michiyasu Komatsu, Hiroki Tonai, Hiroshi Komorita
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Publication number: 20030168729Abstract: An insulating substrate (1) has insulative ceramic layers (2, 3) laid one upon another, an intermediate layer (4) made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer (5) joined to the top surface of a top one of the ceramic layers, and a second conductive layer (6) joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.Type: ApplicationFiled: January 27, 2003Publication date: September 11, 2003Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yutaka Ishiwata, Kosoku Nagata, Toshio Shimizu, Hiroyuki Hiramoto, Yasuhiko Taniguchi, Kouji Araki, Hiroshi Fukuyoshi, Hiroshi Komorita
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Patent number: 6605868Abstract: An insulating substrate (1) has insulative ceramic layers (2, 3) laid one upon another, an intermediate layer (4) made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer (5) joined to the top surface of a top one of the ceramic layers, and a second conductive layer (6) joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.Type: GrantFiled: December 9, 1999Date of Patent: August 12, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Yutaka Ishiwata, Kosoku Nagata, Toshio Shimizu, Hiroyuki Hiramoto, Yasuhiko Taniguchi, Kouji Araki, Hiroshi Fukuyoshi, Hiroshi Komorita
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Patent number: 6485830Abstract: In material for ceramic ball that has a spherical portion of approximate sphere at both ends thereof and a belt-like portion at a center thereof over an entire circumferential direction, a difference between a diagonal diameter of the belt-like portion and a polar diameter of the spherical portion is 100 &mgr;m or less. A height of the belt-like portion from the spherical portion is preferable to be 1 mm or less. A width of the belt-like portion is preferable to be 5 mm or less. The material for ceramic ball can be used for material for bearing balls for instance. When applying in such a usage, the material for ceramic ball essentially consists of silicon nitride, Vickers hardness thereof being preferable to be 1400 or more. In the material for ceramic ball of the present invention, a difference between a diagonal diameter of a belt-like portion and a polar diameter of a spherical portion is set at 100 &mgr;m or less.Type: GrantFiled: September 27, 2000Date of Patent: November 26, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Minoru Takao, Isao Ikeda, Hiroki Tonai
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Publication number: 20020136908Abstract: The present invention provides a silicon nitride wear resistant member composed of silicon nitride sintered body containing 1-10 mass % of rare earth element in terms of oxide thereof as sintering agent, wherein a total oxygen content of the silicon nitride sintered body is 6 mass % or less, a porosity of the silicon nitride sintered body is 0.5 vol. % or less, and a maximum size of pore existing in grain boundary phase of the silicon nitride sintered body is 0.3 &mgr;m or less. According to the above structure of the present invention, there can be provided a silicon nitride wear resistant member and a method of manufacturing the member having a high strength and a toughness property, and particularly excellent in sliding characteristics.Type: ApplicationFiled: January 11, 2002Publication date: September 26, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Michiyasu Komatsu, Hiroki Tonai, Hiroshi Komorita
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Patent number: 6426154Abstract: The present invention provides a ceramic circuit board comprising: a ceramic substrate and a metal circuit plate bonded to the ceramic substrate through a brazing material layer; wherein the brazing material layer is composed of Al—Si group brazing material and an amount of Si contained in the brazing material is 7 wt % or less. In addition, it is preferable to form a thinned portion, holes, or grooves to outer peripheral portion of the metal circuit plate. According to the above structure of the present invention, there can be provided a ceramic circuit board having both high bonding strength and high heat-cycle resistance, and capable of increasing an operating reliability as electronic device.Type: GrantFiled: September 25, 2000Date of Patent: July 30, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Naba, Hiroshi Komorita, Noritaka Nakayama, Kiyoshi Iyogi
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Publication number: 20020066953Abstract: An insulating substrate (1) has insulative ceramic layers (2, 3) laid one upon another, an intermediate layer (4) made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer (5) joined to the top surface of a top one of the ceramic layers, and a second conductive layer (6) joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.Type: ApplicationFiled: December 9, 1999Publication date: June 6, 2002Inventors: YUTAKA ISHIWATA, KOSOKU NAGATA, TOSHIO SHIMIZU, HIROYUKI HIRAMOTO, YASUHIKO TANIGUCHI, KOUJI ARAKI, HIROSHI FUKUYOSHI, HIROSHI KOMORITA
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Patent number: 6232657Abstract: There is provided a semiconductor module which comprises a high thermal conductive silicon nitride substrate 10 having a thermal conductivity of 60 w/m·k or more, a semiconductor element 7 mounted on this high thermal conductive silicon nitride substrate 10, metal circuit plates 3 which are bonded on the semiconductor element-mounted side of this high thermal conductive silicon nitride substrate 10 and single metal plate 4a which is bonded to a side opposing to the semiconductor element-mounted side of this high thermal conductive silicon nitride substrate and is bonded on an apparatus casing 9 or a mounting board. By this constitution, there can be provided a semiconductor module having a simple structure, which can be miniaturized, and having an improved structure strength and an excellent heat cycle resistance property without requiring a heat sink plate or the like.Type: GrantFiled: April 17, 1998Date of Patent: May 15, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Kazuo Ikeda, Michiyasu Komatsu, Yoshitoshi Sato, Takayuki Naba
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Patent number: 6040039Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.S of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.S .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.Type: GrantFiled: November 14, 1997Date of Patent: March 21, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
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Patent number: 5998000Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.Type: GrantFiled: November 14, 1997Date of Patent: December 7, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
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Patent number: 5928768Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.Type: GrantFiled: September 4, 1996Date of Patent: July 27, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
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Patent number: 5672848Abstract: A ceramic circuit board wherein a copper circuit plate is directly bonded at a predetermined position on a ceramic substrate and heat is applied; or the copper circuit plate is integrally bonded through a brazing material containing an active metal, such as Ti, Zr and Hf; and a semiconductor element is bonded onto a semiconductor element mounting portion of the copper circuit plate through a solder layer. The copper plate element is formed with grooves or holes thereon and is bonded on the semiconductor element mounting portion of the copper circuit plate, and the semiconductor element is integrally bonded onto a surface of a grooved or holed side of the copper plate element through a solder layer.Type: GrantFiled: December 28, 1994Date of Patent: September 30, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Tadashi Tanaka, Takayuki Naba, Takashi Hino
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Patent number: 5363278Abstract: A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, characterized in that the Vickers hardness of the copper sheet lies in the range from 40 kg/mm.sup.2 to 100 kg/mm.sup.2.Type: GrantFiled: May 28, 1992Date of Patent: November 8, 1994Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Nobuyuki Mizunoya
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Patent number: 5328751Abstract: This invention provides a ceramic circuit board comprising: a ceramic base board; a metal circuit plate integrally bonded onto a surface of the ceramic base board; a terminal connecting port formed by bending a part of the metal circuit plate for connecting a terminal of a module, the terminal connecting port being formed so that the terminal connecting port is raised from a surface of the ceramic base board, and a curvature radius of the bent portion provided on the terminal connecting port is set to 0.2 mm or more. An empty communication hole such as groove or through hole may also be formed at a bonding surface between the metal circuit plate and the ceramic base board.Type: GrantFiled: July 10, 1992Date of Patent: July 12, 1994Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Nobuyuki Mizunoya, Kazuo Matsumura, Kazuo Ikeda, Takayuki Naba, Tadashi Tanaka
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Patent number: 5280850Abstract: According to this invention, there is provided a method of manufacturing a highly reliable circuit board in which a copper member is strongly, directly bonded to a substrate made of an aluminum nitride sintered body, thereby obtaining high peel strength. The method of manufacturing the circuit board includes the steps of bringing a copper member containing 100 to 1,000 ppm of oxygen into contact with an oxide layer having a thickness of 0.1 to 5 .mu.m formed on a surface of a substrate made of an aluminum nitride sintered body, and heating the substrate in an inert gas atmosphere containing 1 to 100 ppm of oxygen at a temperature not more than a temperature corresponding to a liquidus including a pure copper melting point of a hypoeutectic region of a two-component phase diagram of Cu-Cu.sub.Type: GrantFiled: October 16, 1992Date of Patent: January 25, 1994Assignee: Kabushiki Kaisha ToshibaInventors: Akihiro Horiguchi, Mitsuo Kasori, Fumio Ueno, Hiroshi Komorita
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Patent number: 5176309Abstract: According to this invention, there is provided a method of manufacturing a highly reliable circuit board in which a copper member is strongly, directly bonded to a substrate made of an aluminum nitride sintered body, thereby obtaining high peel strength. The method of manufacturing the circuit board includes the steps of bringing a copper member containing 100 to 1,000 ppm of oxygen into contact with an oxide layer having a thickness of 0.1 to 5 .mu.m formed on a surface of a substrate made of an aluminum nitride sintered body, and heating the substrate in an inert gas atmosphere containing 1 to 100 ppm of oxygen at a temperature not more than a temperature corresponding to a liquidus including a pure copper melting point of a hypoeutectic region of a two-component phase diagram of Cu-Cu.sub.Type: GrantFiled: May 22, 1991Date of Patent: January 5, 1993Assignee: Kabushiki Kaisha ToshibaInventors: Akihiro Horiguchi, Mitsuo Kasori, Fumio Ueno, Hiroshi Komorita, Mitsuyoshi Endo
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Patent number: 5155665Abstract: A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, characterized in that the Vickers hardness of the copper sheet lies in the range from 40 kg/mm.sup.2 to 100 kg/mm.sup.2.Type: GrantFiled: March 16, 1989Date of Patent: October 13, 1992Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Nobuyuki Mizunoya