Patents by Inventor Hiroshi Kozaka

Hiroshi Kozaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5256889
    Abstract: A semiconductor rectifying diode includes a first semiconductor region of one conductivity type, a plurality of third semiconductor regions of the other conductivity type provided on one surface of said first semiconductor region to be spaced a distance W, and a main electrode provided on said one main surface to in ohmic contact with said first semiconductor region and in contact with said third semiconductor regions through the Schottky barrier. To reduce reverse leakage current a relation of 2wo<W.ltoreq.3D is satisfied, where D is the depth of said third semiconductor regions and wo is the width of a depletion layer spread to said first semiconductor region by a diffusion potential of the pn junction formed between said first semiconductor region and said third semiconductor region.
    Type: Grant
    Filed: January 9, 1992
    Date of Patent: October 26, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kozaka, Susumu Murakami, Masanori Takata, Takao Yaginuma, Naofumi Kohno
  • Patent number: 5081509
    Abstract: A semiconductor rectifying diode includes a first semiconductor region of one conductivity type, a plurality of third semiconductor regions of the other conductivity type provided on one surface of said first semiconductor region to be spaced a distance W, and a main electrode provided on said one main surface in ohmic contact with said first semiconductor region and in contact with said third semiconductor regions through the Schottky barrier. To reduce reverse leakage current a relation of 2wo<W.ltoreq.3D is satisfied, where D is the depth of said third semiconductor regions and wo is the width of a depletion layer spread to said first semiconductor region by a diffusion potential of the pn junction formed between said first semiconductor region and said third semiconductor region.
    Type: Grant
    Filed: September 11, 1990
    Date of Patent: January 14, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kozaka, Susumu Murakami, Masanori Takata, Takao Yaginuma, Naofumi Kohno