Patents by Inventor Hiroshi Kuwahara
Hiroshi Kuwahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6335934Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.Type: GrantFiled: August 13, 1999Date of Patent: January 1, 2002Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6314096Abstract: In a packet switching system made up of a single or a plurality of switching nodes or local units each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch on the basis of a logic channel on a packet circuit, a self-routing switch for performing switching on the basis of the output port information, land a control unit for terminating a control packet and performing the call processing function, and a switching node or tandem unit including a single or a plurality of self-routing switches for interconnecting the local units, there are provided a device for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device, operable in the originating side local unit for information transfer, for insertingType: GrantFiled: December 20, 1999Date of Patent: November 6, 2001Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6304570Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: GrantFiled: August 13, 1999Date of Patent: October 16, 2001Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Publication number: 20010028658Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: ApplicationFiled: June 5, 2001Publication date: October 11, 2001Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Publication number: 20010028652Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: ApplicationFiled: June 8, 2001Publication date: October 11, 2001Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Patent number: 6285675Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: GrantFiled: January 12, 1999Date of Patent: September 4, 2001Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Publication number: 20010005386Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: ApplicationFiled: November 29, 2000Publication date: June 28, 2001Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Patent number: 6215788Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: GrantFiled: April 16, 1999Date of Patent: April 10, 2001Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Patent number: 6016317Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: GrantFiled: June 5, 1995Date of Patent: January 18, 2000Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Patent number: 6005867Abstract: In a packet switching system made up of a single or a plurality of switching nodes or local units each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch on the basis of a logic channel on a packet circuit, a self-routing switch for performing switching on the basis of the output port information, and a control unit for terminating a control packet and performing the call processing function, and a switching node or tandem unit including a single or a plurality of self-routing switches for interconnecting the local units, there are provided a device for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating, side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device, operable in the originating-side local unit for information transfer, for insertingType: GrantFiled: May 11, 1995Date of Patent: December 21, 1999Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 5999537Abstract: A packet switching system which includes a device for setting, between a tandem unit and a destination local unit, the same logic channel as that between an originating local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than the originating local unit and a device, operable in the originating-side local unit for information transfer, for inserting output port information of a self-routing switch inside the tandem unit into a packet destined for the local unit other than this local unit; in the tandem unit, setting of logic channel conversion information is not required to be done and even when any control signal packet from the originating local unit arrives at the tandem unit, the packet is transferred to the destination local unit without undergoing termination of packet and concomitant call processing control.Type: GrantFiled: April 23, 1997Date of Patent: December 7, 1999Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 5999162Abstract: In a graph displaying method and apparatus and a processing operation monitoring apparatus, a succession of graph points representing the progress of a process are sequentially displayed from one side to the other on the graph display area of a screen, one added at a time to the leading end of the graph. When the latest graph point arrives at the right end of the graph display area, the graph is shifted back leftwardly to a predetermined position at a speed that can be followed by the operator's eyes, whereupon an additional succession of graph points are sequentially displayed at the leading end of the graph. While the graph is being shifted from the right end of the graph display area to the predetermined position, a plurality of transient graphs is successively displayed from the start position of the movement to the terminating position, thus maintaining continuity of the displaying graph so that the operator can monitor the progress of the process without interruption and/or misrecognition.Type: GrantFiled: May 29, 1990Date of Patent: December 7, 1999Assignee: Hitachi, Ltd.Inventors: Shuichi Takahashi, Hiroshi Kuwahara, Hitoshi Yoshino, Keiji Oshima
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Patent number: 5995510Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.Type: GrantFiled: July 30, 1997Date of Patent: November 30, 1999Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 5838770Abstract: Duplicate optical fibers connect between a base station controller and a radio base station for each route. The duplicate optical fiber is connected to each of the radio base stations for each route through a star coupler. The radio base stations are arranged in each of areas so that the radio base stations for different routes are arranged adjacent to each other.Type: GrantFiled: August 8, 1996Date of Patent: November 17, 1998Assignees: Hitachi, Ltd., Kokusai Electric Co., Ltd.Inventors: Yutaka Fukushima, Tetsuo Takemura, Shinichi Iwaki, Mitsuyoshi Hashida, Masao Wanami, Isao Shimbo, Mitsuhiro Wada, Hirofumi Udaki, Yoshihiro Kondo, Yoshinobu Yamamoto, Arata Nakagoshi, Kouichi Ohta, Hiroshi Kuwahara, Yumiko Watanabe
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Patent number: 5745495Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.Type: GrantFiled: May 5, 1995Date of Patent: April 28, 1998Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 5740156Abstract: A packet switching system which includes a device for setting, between a tandem unit and a destination local unit, the same logic channel as that between an originating local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than the originating local unit and a device, operable in the originating-side local unit for information transfer, for inserting output port information of a self-routing switch inside the tandem unit into a packet destined for the local unit other than this local unit. In the tandem unit, setting of logic channel conversion information is not required to be done and even when any control signal packet from the originating local unit arrives at the tandem unit, the packet is transferred to the destination local unit without undergoing termination of packet and concomitant call processing control.Type: GrantFiled: January 24, 1991Date of Patent: April 14, 1998Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 5734655Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: GrantFiled: May 5, 1995Date of Patent: March 31, 1998Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 5608343Abstract: A circuit changes the timing for reading data by varying bias potential applied to a clock signal used to read the data. The circuit has a comparator for comparing an external clock signal with a reference voltage that provides a logic decision level and generating an internal clock signal, and a logic circuit for fetching input data in synchronization with the internal clock signal. The comparator has a bias changer. The bias changer applies DC bias potential to the external clock signal to the comparator, to change the phase of the internal clock signal.Type: GrantFiled: April 27, 1995Date of Patent: March 4, 1997Assignee: Fujitsu LimitedInventors: Hisayuki Ojima, Hiroshi Kuwahara
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Patent number: 5579370Abstract: Duplicate optical fibers connect between a base station controller and a radio base station for each route. The duplicate optical fiber is connected to each of the radio base stations for each route through a star coupler. The radio base stations are arranged in each of areas so that the radio base stations for different routes are arranged adjacent to each other.Type: GrantFiled: September 8, 1992Date of Patent: November 26, 1996Assignees: Hitachi, Ltd., Kokusai Electric Co., Ltd.Inventors: Yutaka Fukushima, Tetsuo Takemura, Shinichi Iwaki, Mitsuyoshi Hashida, Masao Wanami, Isao Shimbo, Mitsuhiro Wada, Hirofumi Udaki, Yoshihiro Kondo, Yoshinobu Yamamoto, Arata Nakagoshi, Kouichi Ohta, Hiroshi Kuwahara, Yumiko Watanabe
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Patent number: 5513177Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.Type: GrantFiled: February 13, 1991Date of Patent: April 30, 1996Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada