Patents by Inventor Hiroshi Matsuba

Hiroshi Matsuba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11872524
    Abstract: An exhaust pipe device according to an embodiment includes a dielectric pipe; a radio-frequency electrode; a ground electrode; and a plasma generation circuit. The radio-frequency electrode is disposed on an outer periphery side of the dielectric pipe and a radio-frequency voltage is applied to the radio-frequency electrode. The ground electrode is disposed on an end portion side of the dielectric pipe such that a distance from the radio-frequency electrode is smaller on an inner side than on an outer side of the dielectric pipe, and a ground potential is applied to the ground electrode. The plasma generation circuit generates plasma inside the dielectric pipe. The exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump that exhausts gas inside the film forming chamber.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: January 16, 2024
    Assignee: Kioxia Corporation
    Inventors: Hiroshi Matsuba, Akihiro Oishi, Hiroyuki Fukumizu, Kazuaki Kurihara
  • Publication number: 20230160063
    Abstract: An exhaust pipe apparatus according to an embodiment includes a dielectric pipe; a radio-frequency electrode; and a plasma generation circuit. The exhaust pipe apparatus functions as a part of an exhaust pipe disposed between a process chamber and a vacuum pump that exhausts gas inside the process chamber. The radio-frequency electrode includes a thin metal plate disposed on an outer periphery side of the dielectric pipe, a buffer member disposed on an outer periphery side of the thin metal plate, and a conductive hollow structure disposed on an outer periphery side of the buffer member and a radio-frequency voltage is applied to the radio-frequency electrode. The plasma generation circuit generates plasma inside the dielectric pipe.
    Type: Application
    Filed: June 29, 2022
    Publication date: May 25, 2023
    Applicant: Kioxia Corporation
    Inventors: Akihiro Oishi, Hiroshi Matsuba, Hiroyuki Fukumizu
  • Publication number: 20220062820
    Abstract: An exhaust pipe device according to an embodiment includes a dielectric pipe; a radio-frequency electrode; a ground electrode; and a plasma generation circuit. The radio-frequency electrode is disposed on an outer periphery side of the dielectric pipe and a radio-frequency voltage is applied to the radio-frequency electrode. The ground electrode is disposed on an end portion side of the dielectric pipe such that a distance from the radio-frequency electrode is smaller on an inner side than on an outer side of the dielectric pipe, and a ground potential is applied to the ground electrode. The plasma generation circuit generates plasma inside the dielectric pipe. The exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump that exhausts gas inside the film forming chamber.
    Type: Application
    Filed: June 25, 2021
    Publication date: March 3, 2022
    Applicant: Kioxia Corporation
    Inventors: Hiroshi MATSUBA, Akihiro OISHI, Hiroyuki FUKUMIZU, Kazuaki KURIHARA
  • Publication number: 20210249238
    Abstract: An exhaust pipe device according to an embodiment includes a pipe body, a coil, an inner pipe, and a plasma generation circuit. The coil is disposed inside the pipe body. The inner pipe is a dielectric and is disposed inside the coil. The plasma generation circuit is configured to generate plasma inside the inner pipe using the coil. The exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump for exhausting an inside of the film forming chamber.
    Type: Application
    Filed: September 15, 2020
    Publication date: August 12, 2021
    Applicant: Kioxia Corporation
    Inventors: Hiroshi MATSUBA, Akihiro OISHI, Hiroyuki FUKUMIZU, Kazuaki KURIHARA
  • Publication number: 20210062337
    Abstract: An exhaust pipe device according to an embodiment includes a pipe body; a dielectric formed in an annular and disposed along an inner wall of the pipe body; an internal electrode formed in an annular, disposed along an inner wall of the dielectric with a part of an inner wall surface of the dielectric left and configured to expose the part of the inner wall surface of the dielectric left without being disposed to a center side of the pipe body; and a plasma generation circuit configured to generate plasma on an exposed surface of the dielectric by using the internal electrode, wherein the exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump for exhausting an inside of the film forming chamber.
    Type: Application
    Filed: February 4, 2020
    Publication date: March 4, 2021
    Applicant: Kioxia Corporation
    Inventors: Hiroshi MATSUBA, Akihiro OISHI, Kazuaki KURIHARA, Hiroyuki FUKUMIZU
  • Patent number: 10763352
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: September 1, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kohei Oasa, Kikuo Aida
  • Patent number: 10707312
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: July 7, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Patent number: 10651276
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: May 12, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Hung Hung, Kikuo Aida, Kentaro Ichinoseki
  • Patent number: 10593793
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 17, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Kikuo Aida, Hung Hung
  • Publication number: 20200075297
    Abstract: An exhaust pipe device according to an embodiment includes a pipe body; an internal electrode disposed in the pipe body; and a plasma generation circuit configured to generate plasma in the pipe body by using the internal electrode, wherein the exhaust pipe device is used as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump for exhausting an inside of the film forming chamber.
    Type: Application
    Filed: March 4, 2019
    Publication date: March 5, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Akihiro OISHI, Hiroyuki FUKUMIZU, Hiroshi MATSUBA, Kazuaki KURIHARA, Takeshi YAMAUCHI
  • Publication number: 20190296116
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 26, 2019
    Inventors: Hiroshi MATSUBA, Hung HUNG, Tatsuya NISHIWAKI, Kikuo AIDA, Kohei OASA
  • Publication number: 20190288071
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Application
    Filed: September 12, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Kohei OASA, Hiroshi MATSUBA, Hung HUNG, Kikuo AIDA, Kentaro ICHINOSEKI
  • Publication number: 20190288103
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Application
    Filed: September 10, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Kohei OASA, Hiroshi MATSUBA, Kikuo AIDA, Hung HUNG
  • Publication number: 20190259871
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.
    Type: Application
    Filed: August 31, 2018
    Publication date: August 22, 2019
    Inventors: Hiroshi MATSUBA, Hung HUNG, Tatsuya NISHIWAKI, Kohei OASA, Kikuo AIDA
  • Publication number: 20190081173
    Abstract: A semiconductor device which includes a semiconductor layer, a first electrode, a second electrode, first trenches, a second trench surrounding the first trenches, a gate electrode and a first field plate electrode in the first trenches, a first insulating layer including a first portion p having a first film thickness, a second portion having a second film thickness thicker than the first film thickness, and a third portion having a third film thickness thicker than the second film thickness, a second field plate electrode in the second trench, a second insulating layer in the second trench. The semiconductor layer includes a first semiconductor region having a first conductivity type, a second semiconductor region having a second conductivity type, and a third semiconductor region having the second conductivity type.
    Type: Application
    Filed: February 23, 2018
    Publication date: March 14, 2019
    Inventors: Tatsuya NISHIWAKI, Kentaro ICHINOSEKI, Kikuo AIDA, Kohei OASA, Hung HUNG, Hiroshi MATSUBA
  • Publication number: 20150340254
    Abstract: According to an embodiment, a wafer holder includes a heat receiving portion, a heating portion, and a contact making portion. The heat receiving portion receives heat from a heat source. The heating portion heats a wafer using the heat received by the heat receiving portion. The contact making portion makes contact with an outer edge of the wafer. A heat-transfer suppressing portion is provided at least either for the contact making portion, or in between the heat receiving portion and the contact making portion, or in between the heating portion and the contact making portion.
    Type: Application
    Filed: May 18, 2015
    Publication date: November 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takuya MATSUDA, Takahiro TERADA, Tadashi SHIMMURA, Hiroshi MATSUBA, Hiroaki KOBAYASHI, Noriyuki MORIYA
  • Patent number: 8254175
    Abstract: A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: August 28, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Higuchi, Hiroshi Matsuba, Yoshio Ozawa, Tetsuya Kai
  • Publication number: 20100157680
    Abstract: A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 24, 2010
    Inventors: Masaaki Higuchi, Hiroshi Matsuba, Yoshio Ozawa, Tetsuya Kai