Patents by Inventor Hiroshi Shinya

Hiroshi Shinya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050160619
    Abstract: A low-pressure dryer dries a substrate applied a coating solution thereon at low pressure. The dryer includes an airtight chamber installing a substrate table to place the substrate thereon; a diffuser plate, provided as facing the substrate placed on the substrate table with a gap, for discharging gas existing in the gap toward outside, the diffuser plate having a size almost the same as or larger than the substrate; a substrate-temperature adjuster, installed in the substrate table, for adjusting a temperature of the substrate; and a decompression mechanism for decompressing the airtight chamber. The diffuser plate has a temperature adjuster for making temperature adjustments to have a temperature difference between a first region and a second region of the diffuser plate, the first region facing a center region of the substrate, the second region being outside the first region and including a region facing an outer region of the substrate.
    Type: Application
    Filed: March 24, 2005
    Publication date: July 28, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tomohide Minami, Hiroshi Shinya, Takahiro Kitano
  • Publication number: 20050005230
    Abstract: A semiconductor integrated circuit device includes a memory cell array, an error checking and correcting (ECC) circuit which performs an error checking and correcting operation for readout data read out from the normal data storing portion at data readout time during read latency and an I/O buffer. The memory cell array includes a normal data storing portion and a parity data storing portion. The normal data storing portion stores data for use in a normal data write and a normal data read. The parity data storing portion stores parity data for use in error checking and correcting. The EEC circuit carries out error checking and correcting read data read out from the normal data storing portion, during read latency cycle at a data read operation. The I/O buffer outputs the read data error checked and corrected by the ECC circuit, after the read latency cycle has lapsed.
    Type: Application
    Filed: June 29, 2004
    Publication date: January 6, 2005
    Inventors: Mitsuhiro Koga, Hiroshi Shinya
  • Publication number: 20040245237
    Abstract: A heat treatment apparatus is used for performing heat treatment on a wafer (W) having a surface on which a coating film is formed, and includes: a holding member (34) for holding the wafer almost horizontally; a chamber (30) for housing the wafer held by the holding member; a hot plate (31) having gas permeability and disposed above the wafer held by the holding member in the chamber so that the coating film formed on the wafer can be directly heated; and an exhaust port (33) provided on the top face of the chamber and exhausting gas in the chamber. Gas generated from the coating film when the coating film is heated by the hot plate passes through the hot plate and is exhausted to the outside of the chamber. According to the heat treatment apparatus, uniformity of a coating film is improved. As a result, CD uniformity can be improved, LER characteristics are changed for the better, and a smooth pattern side face can be obtained.
    Type: Application
    Filed: April 12, 2004
    Publication date: December 9, 2004
    Inventors: Hiroshi Shinya, Yasutaka Souma, Takahiro Kitano
  • Publication number: 20040216325
    Abstract: A low-pressure dryer dries a substrate applied a coating solution thereon at low pressure. The dryer includes an airtight chamber installing a substrate table to place the substrate thereon; a diffuser plate, provided as facing the substrate placed on the substrate table with a gap, for discharging gas existing in the gap toward outside, the diffuser plate having a size almost the same as or larger than the substrate; a substrate-temperature adjuster, installed in the substrate table, for adjusting a temperature of the substrate; and a decompression mechanism for decompressing the airtight chamber. The diffuser plate has a temperature adjuster for making temperature adjustments to have a temperature difference between a first region and a second region of the diffuser plate, the first region facing a center region of the substrate, the second region being outside the first region and including a region facing an outer region of the substrate.
    Type: Application
    Filed: June 3, 2004
    Publication date: November 4, 2004
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tomohide Minami, Hiroshi Shinya, Takahiro Kitano
  • Patent number: 6796054
    Abstract: A low-pressure dryer dries a substrate applied a coating solution thereon at low pressure. The dryer includes an airtight chamber installing a substrate table to place the substrate thereon; a diffuser plate, provided as facing the substrate placed on the substrate table with a gap, for discharging gas existing in the gap toward outside, the diffuser plate having a size almost the same as or larger than the substrate; a substrate-temperature adjuster, installed in the substrate table, for adjusting a temperature of the substrate; and a decompression mechanism for decompressing the airtight chamber. The diffuser plate has a temperature adjuster for making temperature adjustments to have a temperature difference between a first region and a second region of the diffuser plate, the first region facing a center region of the substrate, the second region being outside the first region and including a region facing an outer region of the substrate.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: September 28, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Tomohide Minami, Hiroshi Shinya, Takahiro Kitano
  • Publication number: 20030172542
    Abstract: A low-pressure dryer dries a substrate applied a coating solution thereon at low pressure. The dryer includes an airtight chamber installing a substrate table to place the substrate thereon; a diffuser plate, provided as facing the substrate placed on the substrate table with a gap, for discharging gas existing in the gap toward outside, the diffuser plate having a size almost the same as or larger than the substrate; a substrate-temperature adjuster, installed in the substrate table, for adjusting a temperature of the substrate; and a decompression mechanism for decompressing the airtight chamber. The diffuser plate has a temperature adjuster for making temperature adjustments to have a temperature difference between a first region and a second region of the diffuser plate, the first region facing a center region of the substrate, the second region being outside the first region and including a region facing an outer region of the substrate.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tomohide Minami, Hiroshi Shinya, Takahiro Kitano
  • Publication number: 20030166305
    Abstract: With respect to a substrate on which a resist solution is applied, the inplane uniformity of the quality of a resist film is improved in a heating processing carried out before exposure, and the yields of products are improved. A substrate on which a resist solution is applied is mounted on a heating plate in a processing vessel. Then, a purge gas is supplied into the processing vessel, and heating is started. Above the mounting position of the substrate, a thickness detecting sensor for monitoring the thickness of the resist film formed on the surface of the substrate is provided. When the thickness becomes a predetermined value or less, a control part cause a lift pin to upwardly move so as to increase the distance between the substrate and the heating plate. Thus, the heating value applied to the substrate decreases, and thereafter, only the solvent is volatilized without having a bad influence on a polymer in the resist film.
    Type: Application
    Filed: March 4, 2003
    Publication date: September 4, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Takahiro Kitano
  • Publication number: 20030145791
    Abstract: A thermal processing apparatus for applying thermal processing to a substrate having a processed film thereon has a discharger for discharging process gas from a processing chamber and a ceiling plate provided between the substrate and the discharger, having apertures at different aperture ratios in accordance with distances from the center of the ceiling plate. The apparatus may have dischargers, provided over concentric circles of the substrate, for discharging process gas from the processing chamber and discharging-amount adjusters each for adjusting a discharging amount of the corresponding discharger. The apparatus may have gas suppliers, provided over the concentric circles of the substrate, for supplying process gas into the processing chamber and supply-amount adjusters each for adjusting a supply amount of the corresponding supplier.
    Type: Application
    Filed: February 6, 2003
    Publication date: August 7, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Takahiro Kitano
  • Patent number: 6573031
    Abstract: A substrate coated with a coating solution is placed on a heating plate in a processing chamber in which an inert gas is circulating. The substrate is heated on the heating plate while the inert gas is circulating at an extremely small first circulating amount. The substrate is heated further on the heating plate while the inert gas is circulating at a second circulating amount larger than the first circulating amount. Detected is the density of the solvent in the processing chamber. The supply and exhaust amounts of the inert gas are controlled based on the density detected after the start of heating, so that an exhaust amount of the inert gas becomes a predetermined amount for a predetermined period until the solvent density reaches a predetermined density. A necessary control process is performed so that the solvent density reaches the predetermined density when the solvent density has not reached or exceeded the predetermined density after the predetermined period has elapsed.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: June 3, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinya, Kazuyoshi Mizumoto, Kazuhisa Hayashida, Eiichi Sekimoto
  • Patent number: 6570801
    Abstract: An internal row address signal is generated by a refresh address counter and supplied to a row decoder. In a normal refresh operation, the refresh address counter sequentially increments the internal row address signal on the basis of a trigger signal. As a result, the data in all memory cells is refreshed. In a low-consumption-current refresh operation, at least one of the bits of the internal row address signal is fixed. Hence, the refresh operation is executed only for the memory cells of a predetermined refresh area.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: May 27, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Munehiro Yoshida, Hiroshi Shinya
  • Publication number: 20020184592
    Abstract: A semiconductor memory device is disclosed which comprises a cell array including a normal data section used for normal data write and read and a parity data section used for check data write and read, the check data being for execution of error check of data as read out of the normal data section, a data buffer for temporal stage of read data from the cell array and write data into the cell array, and an ECC circuit for generating the check data to be stored in the parity data section from write data as input during data writing, and for performing error check and correction of data read out of the normal section based on the data read out of the normal data section and the check data read out of said parity data section during data reading. N-bit parallel data transfer is performed between the data buffer and normal data section whereas m-bit parallel data transfer is done between the data buffer and external input/output terminals (where m and n are integers satisfying m<n).
    Type: Application
    Filed: June 3, 2002
    Publication date: December 5, 2002
    Inventors: Mitsuhiro Koga, Munehiro Yoshida, Hiroshi Shinya
  • Publication number: 20020076659
    Abstract: A substrate coated with a coating solution is placed on a heating plate in a processing chamber in which an inert gas is circulating. The substrate is heated on the heating plate while the inert gas is circulating at an extremely small first circulating amount. The substrate is heated further on the heating plate while the inert gas is circulating at a second circulating amount larger than the first circulating amount. Detected is the density of the solvent in the processing chamber. The supply and exhaust amounts of the inert gas are controlled based on the density detected after the start of heating, so that an exhaust amount of the inert gas becomes a predetermined amount for a predetermined period until the solvent density reaches a predetermined density. A necessary control process is performed so that the solvent density reaches the predetermined density when the solvent density has not reached or exceeded the predetermined density after the predetermined period has elapsed.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 20, 2002
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Kazuyoshi Mizumoto, Kazuhisa Hayashida, Eiichi Sekimoto
  • Publication number: 20020074568
    Abstract: An internal row address signal is generated by a refresh address counter and supplied to a row decoder. In a normal refresh operation, the refresh address counter sequentially increments the internal row address signal on the basis of a trigger signal. As a result, the data in all memory cells is refreshed. In a low-consumption-current refresh operation, at least one of the bits of the internal row address signal is fixed. Hence, the refresh operation is executed only for the memory cells of a predetermined refresh area.
    Type: Application
    Filed: October 16, 2001
    Publication date: June 20, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Munehiro Yoshida, Hiroshi Shinya
  • Patent number: 5928390
    Abstract: A processing apparatus comprises a plurality of process unit groups each including a plurality of process units for subjecting an object to a series of processes, the process units being arranged vertically in multiple stages, an object transfer space being defined among the process unit groups, and a transfer mechanism for transferring the object, the transfer mechanism having a transfer member vertically movable in the object transfer space, the transfer member being capable of transferring the object to each of the process units. The processing apparatus further comprises a mechanism for forming a downward air flow in the object transfer space, a mechanism for controlling the quantity of the downward air flow, and a mechanism for controlling the pressure in the object transfer space. Thus, a variation in condition of the object transfer space is reduced.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: July 27, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Hidetami Yaegashi, Takayuki Toshima, Masami Akimoto, Eiji Yamaguchi, Junichi Kitano, Takayuki Katano, Hiroshi Shinya, Naruaki Iida
  • Patent number: 5876280
    Abstract: The present invention provides a substrate treating system for successively treating a plurality of substrates W under an air-conditioned environment.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: March 2, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Junichi Kitano, Hiroshi Shinya, Takayuki Katano, Hidetami Yaegashi, Yasunori Kawakami, Fumihiko Kawano
  • Patent number: 4849653
    Abstract: There is an R-S flip-flop circuit having a threshold voltage of a first value. An input terminal of a Schmitt trigger circuit having a second threshold voltage of a lower value than the first value and a third threshold voltage of a higher value than the first value is connected to an output terminal of the R-S flip-flop circuit.
    Type: Grant
    Filed: March 8, 1988
    Date of Patent: July 18, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kimimasa Imai, Hiroshi Shinya