Patents by Inventor Hirosshi Morimoto

Hirosshi Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5474941
    Abstract: A method for producing an active matrix substrate using a thin film transistor having a gate electrode on an insulating substrate covered with a gate insulating layer, a semiconductor layer on the gate insulating layer, a channel protective layer on the semiconductor layer, a drain electrode having a portion overlying the gate electrode with the interposition of the gate insulating layer, the semiconductor layer and the channel protective layer, and a source electrode having a portion overlying the gate electrode with the interposition of the gate insulating layer, the method enhancing the transistor characteristics of the active matrix substrate with minimum leakage and the removal of an off-current generated from the presence of electrons and holes.
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: December 12, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Mitani, Hirohisa Tanaka, Hirosshi Morimoto, Tomohiko Yamamoto