Patents by Inventor HIROTAKA YOSHIOKA

HIROTAKA YOSHIOKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11979312
    Abstract: An end-to-end path can be set without providing a hierarchy in a control device of a multi-domain network. A path setting system (10) includes an orchestrator 200 and a control device (100). The orchestrator (200) generates path candidates corresponding to a line of domains through which paths that are candidates for a path pass and transmits the path candidates to control devices (100) of domains through which the path candidates pass to request setting of the path. The control device (100) acquires, from the control devices (100) of other domains through which path candidates pass, metrics of the path candidates in the domains, calculates total metrics, selects an optimum path, and sets the optimum path.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: May 7, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Aki Fukuda, Masatoshi Saito, Hirotaka Yoshioka
  • Patent number: 11966176
    Abstract: A transfer member includes: an inner layer; and an outer layer that is adhered to the inner layer and has a hardness lower than a hardness of the inner layer.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 23, 2024
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Hirotaka Tanaka, Tomoaki Yoshioka, Yoko Miyamoto, Toshiaki Baba, Koichiro Yuasa, Kazuyoshi Hagiwara, Kei Tanaka
  • Publication number: 20240006448
    Abstract: Provided is an imaging device including: a first semiconductor substrate provided with a photoelectric conversion element, a second semiconductor substrate stacked on the first semiconductor substrate with an interlayer insulating film interposed therebetween and provided with a pixel circuit that reads out charges generated in the photoelectric conversion element as a pixel signal, and a via that penetrates the interlayer insulating film and electrically connects a first surface of the first semiconductor substrate facing the second semiconductor substrate and at least a part of a second surface of the second semiconductor substrate facing the first surface.
    Type: Application
    Filed: October 11, 2021
    Publication date: January 4, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takeya MOCHIZUKI, Keiichi NAKAZAWA, Shinichi YOSHIDA, Kenya NISHIO, Nobutoshi FUJII, Suguru SAITO, Masaki OKAMOTO, Ryosuke KAMATANI, Yuichi YAMAMOTO, Kazutaka IZUKASHI, Yuki MIYANAMI, Hirotaka YOSHIOKA, Hiroshi HORIKOSHI, Takuya KUROTORI, Shunsuke FURUSE, Takayoshi HONDA
  • Publication number: 20230269170
    Abstract: An end-to-end path can be set without providing a hierarchy in a control device of a multi-domain network. A path setting system (10) includes an orchestrator 200 and a control device (100). The orchestrator (200) generates path candidates corresponding to a line of domains through which paths that are candidates for a path pass and transmits the path candidates to control devices (100) of domains through which the path candidates pass to request setting of the path. The control device (100) acquires, from the control devices (100) of other domains through which path candidates pass, metrics of the path candidates in the domains, calculates total metrics, selects an optimum path, and sets the optimum path.
    Type: Application
    Filed: July 1, 2020
    Publication date: August 24, 2023
    Inventors: Aki Fukuda, Masatoshi Saito, Hirotaka YOSHIOKA
  • Publication number: 20230113565
    Abstract: Provided is a light-emitting device and a method for manufacturing the same which allow the filling performance of the film that fills the space around light-emitting elements to be improved. The light-emitting device according to the disclosure includes a substrate, a plurality of light-emitting elements and a plurality of electrodes sequentially provided on a first surface of the substrate, and a film provided on the first surface of the substrate to surround the light-emitting elements, and when the first surface is a bottom surface of the substrate, the lowermost part of a bottom surface of the film is provided in a higher position than a bottom surface of the electrode. In this way, for example, the film is formed before the substrate is provided on another substrate, so that the filling performance of the film that fills the space around the light-emitting elements can be improved.
    Type: Application
    Filed: February 1, 2021
    Publication date: April 13, 2023
    Inventors: SHUNSUKE FURUSE, HIROTAKA YOSHIOKA
  • Publication number: 20230030183
    Abstract: A domain A (10) including one or more boundary nodes (13) is provided with a VIF (13v) which is a virtual connection unit for virtual connection with an adjacent domain B (20), and the domain B (20) including one or more boundary nodes (21) is provided with a VIF (21v) which is a virtual connection unit for virtual connection with the domain A (10), in which the boundary node (13) notifies the VIF (21v) adjacent to the VIF (13v) of a VIF warning by receiving an internal warning in a format capable of being processed within the domain A (10), and converting the internal warning into the VIF warning which is a warning of the VIF (13v) capable of being processed in common between the domains, and the boundary node (21) transfers the internal warning to another node within the domain B (20) by converting the VIF warning of the VIF (21v) into an internal warning in a format capable of being processed within the domain B (20).
    Type: Application
    Filed: June 28, 2019
    Publication date: February 2, 2023
    Inventors: Minoru Yamaguchi, Yoshinori Koike, Hirotaka YOSHIOKA
  • Publication number: 20220392937
    Abstract: The present disclosure relates to an imaging apparatus and electronic equipment that make it possible to reduce peeling stresses at angled sections included in the four corners of a lens, and prevent the lens from being peeled off. An imaging apparatus includes a solid-state imaging element that generates a pixel signal by photoelectric conversion according to a light amount of incident light, a glass substrate provided on the solid-state imaging element, and a lens provided on the glass substrate, in which four corners of the lens that is substantially rectangular when seen in a plan view do not have angles equal to or smaller than 90°. The present technology may be applied to an imaging apparatus and the like, for example.
    Type: Application
    Filed: October 30, 2020
    Publication date: December 8, 2022
    Inventor: HIROTAKA YOSHIOKA
  • Publication number: 20220385207
    Abstract: The disclosure provides an inverter device for driving an electric motor, including: an inverter circuit including a plurality of switching elements; and a control circuit controlling the inverter circuit. When a rotation speed of the electric motor is equal to or less than a preset rotation speed threshold and a torque of the electric motor is equal to or greater than a preset torque threshold, the control circuit changes a temperature estimation logic of the switching elements of the inverter circuit.
    Type: Application
    Filed: May 25, 2022
    Publication date: December 1, 2022
    Applicant: NIDEC ELESYS CORPORATION
    Inventors: Hirotaka YOSHIOKA, Jun KATSUMATA, Toshiyuki WATANABE
  • Publication number: 20220359620
    Abstract: An imaging device according to an embodiment of the present disclosure includes: a first semiconductor substrate (100) provided with pixels including a photoelectric conversion element (PD) and floating diffusion (FD) that temporarily holds a charge output from the photoelectric conversion element (PD); and a semiconductor layer (200Y) provided on the first semiconductor substrate (100) via an insulating film (123), the semiconductor layer (200Y) including a readout circuit unit (539) that reads out the charge held in the floating diffusion (FD) and outputs a pixel signal, in which the semiconductor layer (200Y) is formed of an organic semiconductor material.
    Type: Application
    Filed: June 17, 2020
    Publication date: November 10, 2022
    Inventors: KENYA NISHIO, SUGURU SAITO, NOBUTOSHI FUJII, HIROTAKA YOSHIOKA
  • Publication number: 20220037382
    Abstract: The present disclosure relates to a backside-illumination solid-state image pickup apparatus and a backside-illumination solid-state image-pickup-apparatus manufacturing method, an image pickup apparatus, and electronic equipment that are configured to make it possible to reduce manufacturing costs. A diced memory circuit and logic circuit are laid out in a horizontal direction, are embedded and flattened by using an oxide film, and are stacked so as to be enclosed in a plane direction under a solid-state image pickup element. The present disclosure can be applied to an image pickup apparatus.
    Type: Application
    Filed: December 6, 2019
    Publication date: February 3, 2022
    Inventors: Naoki KOMAI, Hirotaka YOSHIOKA, Satoru WAKIYAMA, Yuichi YAMAMOTO, Taizo TAKACHI
  • Publication number: 20210314278
    Abstract: [Problem] Efficiently utilizing physical resources in a communication system that builds a virtual network based on various requirements. [Solution] A communication system (10) includes a Spine switch group (12) consisting of a plurality of Spine switches (102), a Leaf switch group (14) consisting of a plurality of Leaf switches (104), a plurality of servers (106) connected to any one of the plurality of Leaf switches (104), and a controller (110) configured to build a virtual network on the physical resources. At least one of the Spine switch group (12) and the Leaf switch group (14) is constituted by a mix of switch devices having different performance. The controller (110) selects physical resources to be used for building the virtual network based on the desired performance of the virtual network.
    Type: Application
    Filed: August 7, 2019
    Publication date: October 7, 2021
    Inventors: Minoru YAMAGUCHI, Yoshinori KOIKE, Hitoshi IRINO, Hirotaka YOSHIOKA
  • Publication number: 20200357838
    Abstract: Provided is a laminated lens structure capable of corresponding various optical parameters. The laminated lens structure includes at least one or more sheets of first lens-attached substrates and at least one or more sheets of second lens-attached substrates as a lens-attached substrate including a lens resin portion that forms a lens, and a carrier substrate that carries the lens resin portion. The carrier substrate of the first lens-attached substrates is constituted by laminating a plurality of sheets of carrier configuration substrates in a thickness direction, and the carrier substrate of the second lens-attached substrates is constituted by one sheet of carrier configuration substrate. For example, the present technology is applicable to a camera module and the like.
    Type: Application
    Filed: August 17, 2018
    Publication date: November 12, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Munekatsu FUKUYAMA, Hirotaka YOSHIOKA, Kunihiko HIKICHI, Atsushi YAMAMOTO, Kaori TAKIMOTO, Minoru ISHIDA
  • Patent number: 10534162
    Abstract: Substrates with lenses having lenses disposed therein are aligned with high accuracy. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are direct-bonded and stacked. In particular, one or more air grooves formed in surfaces of the substrates reduces an influence of air inside a void portion between adjacent lenses of a layered lens structure.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: January 14, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hirotaka Yoshioka, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Publication number: 20180217361
    Abstract: Substrates with lenses having lenses disposed therein are aligned with high accuracy. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are direct-bonded and stacked. In particular, one or more air grooves formed in surfaces of the substrates reduces an influence of air inside a void portion between adjacent lenses of a layered lens structure.
    Type: Application
    Filed: July 19, 2016
    Publication date: August 2, 2018
    Inventors: Hirotaka YOSHIOKA, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Patent number: 9419040
    Abstract: There is provided a solid state image pickup apparatus including a first semiconductor substrate and a second semiconductor substrate which are bonded to each other, and a buried portion formed in a peripheral portion of the apparatus with a depth of a bonded surface of the first semiconductor substrate and the second semiconductor substrate in such a manner that the bonded surface of the first semiconductor substrate and the second semiconductor substrate is not exposed.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: August 16, 2016
    Assignee: SONY CORPORATION
    Inventors: Kenta Nojima, Kengo Kotoo, Hirotaka Yoshioka, Kenta Ikeda
  • Publication number: 20150214263
    Abstract: There is provided a solid state image pickup apparatus including a first semiconductor substrate and a second semiconductor substrate which are bonded to each other, and a buried portion formed in a peripheral portion of the apparatus with a depth of a bonded surface of the first semiconductor substrate and the second semiconductor substrate in such a manner that the bonded surface of the first semiconductor substrate and the second semiconductor substrate is not exposed.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 30, 2015
    Inventors: Kenta Nojima, Kengo Kotoo, Hirotaka Yoshioka, Kenta Ikeda
  • Patent number: 8946797
    Abstract: There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Kyohei Mizuta, Osamu Oka, Kaoru Koike, Nobutoshi Fujii, Hideki Kobayashi, Hirotaka Yoshioka
  • Publication number: 20130256824
    Abstract: There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region.
    Type: Application
    Filed: April 1, 2013
    Publication date: October 3, 2013
    Applicant: Sony Corporation
    Inventors: KYOHEI MIZUTA, OSAMU OKA, KAORU KOIKE, NOBUTOSHI FUJII, HIDEKI KOBAYASHI, HIROTAKA YOSHIOKA