Patents by Inventor Hiroto Miyake

Hiroto Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210141256
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
    Type: Application
    Filed: December 18, 2020
    Publication date: May 13, 2021
    Applicant: Japan Display Inc.
    Inventors: Yohei YAMAGUCHI, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Publication number: 20210114076
    Abstract: A method includes press forming a metal sheet into an intermediate formed product bent out of a plane and forming into a desired press-formed component shape. In a region to be a flange portion, an angle to be bent out of the plane is equal to or less than an angle formed by the flange portion at the curved portion in the press-formed component shape. The projection portion has a largest projection height at the center portion in the longitudinal direction of the region to be the curved portion as seen in the side view, and a longitudinal length of a region to be the top sheet portion is set to coincide with or approach a longitudinal length of the top sheet portion in the press-formed component shape.
    Type: Application
    Filed: February 21, 2019
    Publication date: April 22, 2021
    Applicant: JFE STEEL CORPORATION
    Inventors: Hiroto MIYAKE, Toyohisa SHINMIYA, Yuji YAMASAKI
  • Publication number: 20210114075
    Abstract: A metal sheet for press forming has a shape such that a boundary position between the region corresponding to the curved portion and an other region in the region corresponding to a curved portion is rotationally displaced in-plane around a rotational center set at a position on a curved recessed side rather than a position corresponding to a ridge line between a top sheet portion and a vertical wall portion on the curved recessed side, in a direction in which a line length of an outer edge of a position to be formed into the flange portion on a curved protruding side in the region corresponding to a curved portion approaches a line length of an outer edge of the flange portion on the curved protruding side in the press-formed component shape.
    Type: Application
    Filed: February 21, 2019
    Publication date: April 22, 2021
    Applicant: JFE STEEL CORPORATION
    Inventors: Hiroto MIYAKE, Toyohisa SHINMIYA, Yuji YAMASAKI
  • Patent number: 10895792
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: January 19, 2021
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Publication number: 20200398328
    Abstract: A press forming technology capable of reducing forming defects in a formed component having a hat-shaped cross-sectional shape and including a shape curved to protrude toward a flange portion in a side view. The technology includes a first forming step of press forming a metal sheet into an intermediate formed product that includes a wavy shape including uneven shapes continuous along a longitudinal direction in vertical wall portion and flange portion forming positions, an amplitude of the uneven shapes in a sheet thickness direction increasing toward a position corresponding to a boundary between the portions, and a second forming step of performing bending on the intermediate formed product. A longitudinal line length at the position corresponding to the boundary between the portions in the intermediate formed product is set to coincide with or approach a longitudinal line length at the boundary between the portions in the press-formed component shape.
    Type: Application
    Filed: February 21, 2019
    Publication date: December 24, 2020
    Applicant: JFE STEEL CORPORATION
    Inventors: Hiroto MIYAKE, Toyohisa SHINMIYA, Yuji YAMASAKI
  • Publication number: 20200117035
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
    Type: Application
    Filed: December 12, 2019
    Publication date: April 16, 2020
    Applicant: Japan Display Inc.
    Inventors: Yohei YAMAGUCHI, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Publication number: 20200101509
    Abstract: To reduce warping of vertical wall portions without causing buckling occurring in a component shape not having a flange portion. A punch and a pad sandwiching a top sheet portion therebetween in the sheet thickness direction, bending blades for bend-forming the vertical wall portions, and stoppers facing the bending blades in the press direction and constraining end portions of a material to be machined are provided. The punch is supported by a first cushion component elastically expandable and contractible in the press direction. The bending blades each have an upper die component and a lower die component disposed facing each other in the press direction with an interval (D) equal to or larger than a set compression amount and a second cushion component interposed between the upper die component and the lower die component, maintaining the interval (D), and contractible in the press direction at a predetermined pressure or more.
    Type: Application
    Filed: March 19, 2018
    Publication date: April 2, 2020
    Applicant: JFE Steel Corporation
    Inventors: Hiroto Miyake, Toyohisa Shinmiya
  • Publication number: 20200055979
    Abstract: Provided is a sheet-like prepreg that has both a low coefficient of linear thermal expansion and high flexibility and offers excellent anti-warpage performance and cracking resistance. The sheet-like prepreg according to the present invention includes a curable composition and a sheet-like porous support impregnated with the curable composition. The sheet-like porous support is made from a material having a coefficient of linear thermal expansion of 10 ppm/K or less. The sheet-like prepreg gives a cured product having a glass transition temperature of ?60° C. to 100° C. The curable composition includes one or more curable compounds (A) and at least one of a curing agent (B) and a curing catalyst (C). The curable compounds (A) include an epoxide having a weight per epoxy equivalent of 140 to 3000 g/eq in an amount of 50 weight percent or more of the totality of the curable compounds (A).
    Type: Application
    Filed: October 3, 2017
    Publication date: February 20, 2020
    Applicant: DAICEL CORPORATION
    Inventors: Hiroto MIYAKE, Kiyoharu TSUTSUMI, Ryosuke IEKI
  • Publication number: 20200023418
    Abstract: To reduce warping of vertical wall portions without causing buckling during pressing. Press-forming into a hat cross-sectional shape having one linear vertical wall portion and the other curved vertical wall portion and not having a flange portion is performed. A punch and a pad sandwiching a top sheet portion therebetween, bending blades, and stoppers are provided. The punch is supported by a first cushion component. The bending blades each have an upper die component and a lower die component disposed facing each other in the press direction with an interval (D) equal to a set compression amount in the range of 2% or more and 6% or less of the heights of the vertical wall portions and a second cushion component interposed between the upper die component and the lower die component, maintaining the interval (D), and contractible in the press direction.
    Type: Application
    Filed: March 19, 2018
    Publication date: January 23, 2020
    Applicants: JFE Steel Corporation, H-ONE CO., LTD.
    Inventors: Hiroto Miyake, Toyohisa Shinmiya, Daisuke Toyoda, Hiroyuki Takebe, Youichi Konkawa
  • Patent number: 10539846
    Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: January 21, 2020
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Publication number: 20190329457
    Abstract: Provided is a resin composition capable of forming an imprint replica mold that enables easy removal of a residual layer and enables formation of high-accuracy patterns. The resin composition for replica mold formation includes (A) a thermoplastic or thermosetting resin, and (B) a compound. The resin (A) has a transmittance of light of 50% or more at one or more wavelengths from 200 to 450 nm. The compound (B) is capable of absorbing or scattering light at the wavelength(s). The compound (B) is present in a proportion of 0.5 to 50 parts by weight per 100 parts by weight of the resin (A). The resin (A) is preferably selected from olefinic resins and silicone resins.
    Type: Application
    Filed: November 16, 2017
    Publication date: October 31, 2019
    Applicant: DAICEL CORPORATION
    Inventors: Hiroto MIYAKE, Kiyoharu TSUTSUMI
  • Publication number: 20180364509
    Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
    Type: Application
    Filed: August 23, 2018
    Publication date: December 20, 2018
    Applicant: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Patent number: 10118322
    Abstract: Provided is a sheet-shaped mold possessing a high strength and having a low breakage rate in demolding even in a case where the mold is thin and has a large-area. The sheet-shaped mold is prepared by combining a cured silicone rubber containing a polyorganosiloxane and a fiber for reinforcing the cured silicone rubber. The fiber may comprise a cellulose nanofiber. The sheet-shaped mold may have an uneven pattern on at least one surface (or side) thereof. The fiber may be surface-treated with a hydrophobizing agent. The fiber may forma nonwoven fabric, and the nonwoven fabric may be impregnated with the cured silicone rubber. The cured silicone rubber may comprise a two-component curable silicone rubber having a polydimethylsiloxane unit. The sheet-shaped mold may be a mold for nanoimprint lithography using a photo-curable resin.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 6, 2018
    Assignee: DAICEL CORPORATION
    Inventors: Tomoya Mizuta, Takuya Osaka, Katsuhiro Nakaguchi, Arimichi Okumura, Hiroto Miyake, Masaya Omura, Naotaka Nishio
  • Patent number: 10088728
    Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: October 2, 2018
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Patent number: 9964824
    Abstract: According to one embodiment, a display device includes a TFT on an insulating substrate. The TFT includes a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a source electrode and a drain electrode each provided in contact with at least a part of the semiconductor layer. The source and drain electrodes have a laminated structure including a lower layer, an intermediate layer and an upper layer. The source and drain electrodes include sidewalls each including a first tapered portion on the upper layer side, a second tapered portion on the lower layer side and a sidewall protective film attached to the second tapered portion. The taper angle of the first tapered portion is smaller than that of the second tapered portion.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: May 8, 2018
    Assignee: Japan Display Inc.
    Inventors: Isao Suzumura, Arichika Ishida, Norihiro Uemura, Hidekazu Miyake, Hiroto Miyake, Yohei Yamaguchi
  • Patent number: 9947798
    Abstract: According to one embodiment, a display device includes thin-film transistor. The thin-film transistor includes a first semiconductor layer, a first insulating film, a gate electrode, a second insulating film, a second semiconductor layer, a first electrode and a second electrode. The gap between the bottom surface of the gate electrode and the upper surface of the first channel region of the first semiconductor layer is larger than the gap between the upper surface of the gate electrode and the bottom surface of the second channel region of the second semiconductor layer.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: April 17, 2018
    Assignee: Japan Display Inc.
    Inventors: Hidekazu Miyake, Arichika Ishida, Norihiro Uemura, Hiroto Miyake, Isao Suzumura, Yohei Yamaguchi
  • Publication number: 20170343845
    Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
    Type: Application
    Filed: July 28, 2017
    Publication date: November 30, 2017
    Applicant: Japan Display Inc.
    Inventors: Yohei YAMAGUCHI, Arichika ISHIDA, Hidekazu MIYAKE, Hiroto MIYAKE, Isao SUZUMURA
  • Patent number: 9772536
    Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: September 26, 2017
    Assignee: JAPAN DISPLAY INC.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Patent number: 9690193
    Abstract: Disclosed is a curable composition for nanoimprinting, which includes one or more polymerizable monomers, in which one or more monofunctional radically polymerizable monomers occupy 90 percent by weight or more of the one or more polymerizable monomers, and the one or more monofunctional radically polymerizable monomers give a polymer having a glass transition temperature of 25° C. or higher. The one or more monofunctional radically polymerizable monomers are preferably at least one compound selected from (meth)acrylic ester compounds, styrenic compounds, and vinyl ether compounds.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: June 27, 2017
    Assignee: DAICEL CORPORATION
    Inventors: Hiroto Miyake, Takao Yukawa, Shuso Iyoshi
  • Publication number: 20170168334
    Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Applicant: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura