Abstract: A turning device includes a rattling restriction mechanism configured to restrict a rattling in a turning direction of a turner caused by backlashes in a transmission mechanism. The rattling restriction mechanism includes a pushed portion and a restriction section. The pushed portion includes a pushed face facing the turning direction. The restriction section includes: a contact member configured to come into contact with the pushed face while the pushed face is positioned in a specific range in the turning direction, the contact member is arranged in a movement path of the pushed face configured to move in conjunction with a turning of the turner; and a biasing mechanism configured to bias the contact member in contact with the pushed face, toward the pushed face in the turning direction.

Abstract: A travel body includes a wheel drive source for driving a drive wheel, a support arm swingable relative to a travel body section and supporting the drive wheel and the wheel drive source, a swing support attached to the travel body section and supporting the swing fulcrum of the support arm, and an elastic unit. The swing support is detachably attached to the travel body section. The elastic unit includes an abutting section that abuts, from a second side in the swing direction, a target spot located away from the swing fulcrum of the support arm, and an elastic section that biases the abutting section abutting the support arm toward a first side in the swing direction.

Abstract: A pair of drive wheels are disposed in a middle region of a travel body section in a body length direction and are separated from each other in a body width direction. A first drive source is disposed on a first side in the body length direction relative to a width direction reference line and a first side in a body width direction relative to a length direction reference line in top-down view. A second drive source is disposed on a second side in the body length direction relative to the width direction reference line and a second side in the body width direction relative to the length direction reference line in top-down view.

Abstract: A transfer device includes: a pusher configured to push a container during a delivery operation; a lockable portion lockable to the container during a pick-up operation; a transfer drive unit configured to cause the pusher and the lockable portion to reciprocate in the transfer direction; and a lock drive unit configured to drive the lockable portion separately from the pusher and causes the lockable portion to change in orientation. The transfer device performs a delivery operation by moving, toward a delivery side in the transfer direction, the pusher in contact with a container rear face portion with use of the transfer drive unit, and performs a pick-up operation by moving the lockable portion in the locking orientation toward a pick-up side in the transfer direction with use of the transfer drive unit.

Abstract: A transfer driver includes a transfer drive transmission mechanism drivingly coupled to a contact section, and a transfer drive source configured to drive the transfer drive transmission mechanism. A guide driver includes a guide drive transmission mechanism drivingly coupled to a pair of guide sections, and a guide drive source configured to drive the guide drive transmission mechanism. The transfer drive source and the guide drive source are disposed on a transfer-direction scooping side relative to a holder, and the transfer drive transmission mechanism and the guide drive transmission mechanism intersect each other in a vertical view at an intersection portion, and are adjacent to each other in a vertical direction at the intersection portion.

Abstract: In a display device, an object approaching a display unit is detected by referring to an image picked up by the display unit. An alternating current drive circuit drives an alternating current signal to the display unit, so that a detection circuit detects an amplitude change or a phase shift. Alternatively, a liquid crystal panel is vibrated at a predetermined frequency, so that the strength of the frequency of the vibration sound is detected. This makes it possible to more accurately detect the timing when the object touches the display unit.

Abstract: A liquid crystal display includes a scan line driver (12) to drive scan lines and a power source (14) to supply voltage to the scan line driver. The scan line driver and power source are formed directly on an array substrate of the liquid crystal display. The liquid crystal display also includes a signal-line-driving IC (15) mounted on the array substrate. The IC incorporates a power source (DC voltage converter (1508) and voltage stabilizer (1509)) to supply voltage to a signal line driver (analog output circuit (1504) and the like). The power source in the IC is integrated according to a low-withstanding-voltage manufacturing process. With these configurations, the liquid crystal display is compact and is manufacturable at a low cost.

Abstract: With regard to a display device having an SRAM incorporated in a pixel, a technology is disclosed, which is capable of reducing manufacturing costs by simplifying a constitution of a driver. A write voltage equivalent to white or black represented by a tone level of a normal display area is converted into a write voltage corresponding to a brightest white display or a darkest black display in the pixel, and is held in the SRAM of each pixel. In the case of normal display, display is carried out with the write voltage represented by the tone level of the normal display area. In the case of static image display, display is carried out with the write voltage corresponding to the brightest white display or the darkest black display in the pixel, the write voltage being held in the SRAM. Since the normal display and the static image display can be carried out with a write voltage supplied from one driver, the constitution of the driver can be simplified.

Abstract: A multi-gray level display designed to display multi-gray level images free of flicker or the like, by using a small number of voltages. The display comprises a first gray-level pattern generating circuit 311 for generating a first gray-level pattern which acquires a gray level during m frame periods, a second gray-level pattern generating circuit 321 for generating a second gray-level pattern which acquires another gray level during n frame periods (n is a positive integer greater than m), and a selection circuit 341 for selecting and outputting one of the preset voltages, in accordance with an output from the first gray-level pattern generating circuit 311 or the second gray-level pattern generating circuit 321 when the input multi-gray level display data corresponds to a gray level of either the first gray-level pattern or the second gray-level pattern.

Abstract: With regard to a display device having an SRAM incorporated in a pixel, a technology is disclosed, which is capable of reducing manufacturing costs by simplifying a constitution of a driver. A write voltage equivalent to white or black represented by a tone level of a normal display area is converted into a write voltage corresponding to a brightest white display or a darkest black display in the pixel, and is held in the SRAM of each pixel. In the case of normal display, display is carried out with the write voltage represented by the tone level of the normal display area. In the case of static image display, display is carried out with the write voltage corresponding to the brightest white display or the darkest black display in the pixel, the write voltage being held in the SRAM. Since the normal display and the static image display can be carried out with a write voltage supplied from one driver, the constitution of the driver can be simplified.

Abstract: A jitter correction circuit includes a delayed signal generator and an output circuit. A correction subject signal Ckd0 is derived from multiplying a horizontal synchronization signal or a reference signal Vref. The correction subject signal includes jitters. The delayed signal generator is provided with a plurality of delay elements Fd1 through Fdn which receive and delay the correction subject signal, respectively, by predetermined delay time to generate delayed signals Ckd1 through Ckdn. The output circuit outputs one of the correction subject signal Ckd0 and the delayed signals Ckd1 trough Ckdn on the condition that it has predetermined timing relationship with the reference signal Vref.

Abstract: A display device disclosed includes a liquid crystal display panel, a signal-line driver circuit responsive to image data Data and a first clock signal CK1 for generating signals supplied to signal lines, a control signal generator circuit (12) responsive to a reference clock signal for generating and issuing first clock signal CK1 and adjustment clock signals SCK, and a delay-time adjuster circuit (14) which delays the image data by a specified time interval based on a corresponding adjustment clock signal SCK from the control signal generator circuit (12) to adjust the delay time of the first clock signal CK1 as generated by the control signal generator circuit (12) with respect to the image data Data, wherein this delay-time adjuster circuit (14) is provided with phase-locked loop or PLL circuits (16) for correction of the adjustment clock signals SCK, and a PLL circuit (34) for correction of the first clock signal CK1 being supplied to the signal-line driver circuit, thereby causing the first clock signal

Abstract: A multi-gray level display designed to display multi-gray level images free of flicker or the like, by using a small number of voltages. The display comprises a first gray-level pattern generating circuit 311 for generating a first gray-level pattern which acquires a gray level during m frame periods, a second gray-level pattern generating circuit 321 for generating a second gray-level pattern which acquires another gray level during n frame periods (n is a positive integer greater than m), and a selection circuit 341 for selecting and outputting one of the preset voltages, in accordance with an output from the first gray-level pattern generating circuit 311 or the second gray-level pattern generating circuit 321 when the input multi-gray level display data corresponds to a gray level of either the first gray-level pattern or the second gray-level pattern.

Abstract: A power supply switching circuit includes first to third MOS transistors (P1, P2 and P3) connected in series between a high-potential source and a standard-potential source. The circuit performs a switching operation using a standard-potential and at least one potential which is different from the standard-poential, and outputs plural power supply potentials. The third MOS transistor (P3) is inserted between the first and second MOS transistors (P1 and P2). The back gate of the third transistor (P3) is connected to an output terminal (OUT1) formed between the second transistor (P2) and the third transistor (P3) and prevents the formation of a current path via turned-off transistor (P1) due to the action of a parasitic diode in the first and second transistors caused by potential fluctuations.

Abstract: A memory cell of a nonvolatile semiconductor memory device includes a P conductive type semiconductor substrate, first and second diffusion layers of an N conductivity type, formed in the substrate, a channel region formed in the surface region of the substrate, and which is located between the first and second diffusion layers, a floating gate electrode formed on the channel region, and a control gate electrode formed on the floating gate electrode. The memory cell further includes a third diffusion layer of the N conductivity type, and formed between the first layer and the channel region, the third layer having an impurity concentration lower than that of the first layer.