Patents by Inventor Hiroyuki Demura

Hiroyuki Demura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10153776
    Abstract: The present invention provides a frequency synthesizer that is switchable at a high speed and includes a few unnecessary frequency components in an output frequency signal. In a frequency synthesizer 1, a DDS 2 operates based on a clock signal to generate a reference frequency signal with a predetermined reference frequency, and clock signal supply units 41 and 42 switch the clock signals that have different clock frequencies to supply to the DDS 2. When the clock signals are switched to operate the DDS 2, the storage unit 12 stores a combination of a clock frequency fclk, a reference frequency fc, and a dividing number N in association with an output frequency fVCO of the frequency synthesizer 1 such that a spurious frequency does not exist within a predetermined frequency range and a dividing number of a variable frequency divider 302 disposed on a PLL circuit 3 is minimum. Setting units 11 and 24 read setting items stored in the storage unit 12 to set respective units.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: December 11, 2018
    Assignee: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Hiroyuki Demura, Kaoru Kobayashi
  • Publication number: 20170310331
    Abstract: The present invention provides a frequency synthesizer that is switchable at a high speed and includes a few unnecessary frequency components in an output frequency signal. In a frequency synthesizer 1, a DDS 2 operates based on a clock signal to generate a reference frequency signal with a predetermined reference frequency, and clock signal supply units 41 and 42 switch the clock signals that have different clock frequencies to supply to the DDS 2. When the clock signals are switched to operate the DDS 2, the storage unit 12 stores a combination of a clock frequency fclk, a reference frequency fc, and a dividing number N in association with an output frequency fVCO of the frequency synthesizer 1 such that a spurious frequency does not exist within a predetermined frequency range and a dividing number of a variable frequency divider 302 disposed on a PLL circuit 3 is minimum. Setting units 11 and 24 read setting items stored in the storage unit 12 to set respective units.
    Type: Application
    Filed: September 24, 2015
    Publication date: October 26, 2017
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Hiroyuki DEMURA, Kaoru KOBAYASHI
  • Patent number: 9300250
    Abstract: To provide, in a frequency synthesizer including: a variable attenuator provided at a subsequent stage of a voltage controlled oscillator; a detector; and a control unit outputting a control voltage for adjusting an attenuation amount of the variable attenuator via a digital/analog converter in accordance with a detection voltage, a technology with which a spurious due to a change in an output of the digital/analog converter can be suppressed. A low-pass filter is provided between an output side of a digital/analog converter and a variable attenuator to cut a frequency component corresponding to an overshoot generated when an output of the digital/analog converter is changed.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: March 29, 2016
    Assignee: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Yasuo Kitayama, Hiroyuki Demura, Naoki Onishi
  • Publication number: 20140077844
    Abstract: To provide, in a frequency synthesizer including: a variable attenuator provided at a subsequent stage of a voltage controlled oscillator; a detector; and a control unit outputting a control voltage for adjusting an attenuation amount of the variable attenuator via a digital/analog converter in accordance with a detection voltage, a technology with which a spurious due to a change in an output of the digital/analog converter can be suppressed. A low-pass filter is provided between an output side of a digital/analog converter and a variable attenuator to cut a frequency component corresponding to an overshoot generated when an output of the digital/analog converter is changed.
    Type: Application
    Filed: November 18, 2013
    Publication date: March 20, 2014
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Yasuo Kitayama, Hiroyuki Demura, Naoki Onishi
  • Patent number: 8633735
    Abstract: To provide, in a frequency synthesizer including: a variable attenuator provided at a subsequent stage of a voltage controlled oscillator; a detector; and a control unit outputting a control voltage for adjusting an attenuation amount of the variable attenuator via a digital/analog converter in accordance with a detection voltage, a technology with which a spurious due to a change in an output of the digital/analog converter can be suppressed. A low-pass filter is provided between an output side of a digital/analog converter and a variable attenuator to cut a frequency component corresponding to an overshoot generated when an output of the digital/analog converter is changed.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: January 21, 2014
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Yasuo Kitayama, Hiroyuki Demura, Naoki Onishi
  • Publication number: 20120105110
    Abstract: To provide, in a frequency synthesizer including: a variable attenuator provided at a subsequent stage of a voltage controlled oscillator; a detector; and a control unit outputting a control voltage for adjusting an attenuation amount of the variable attenuator via a digital/analog converter in accordance with a detection voltage, a technology with which a spurious due to a change in an output of the digital/analog converter can be suppressed. A low-pass filter is provided between an output side of a digital/analog converter and a variable attenuator to cut a frequency component corresponding to an overshoot generated when an output of the digital/analog converter is changed.
    Type: Application
    Filed: September 15, 2011
    Publication date: May 3, 2012
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Yasuo Kitayama, Hiroyuki Demura, Naoki Onishi
  • Patent number: 8149069
    Abstract: A low noise voltage-controlled oscillating circuit which can remove a power source noise to improve low frequency noise characteristics is disclosed. A capacitor C11 is provided between a base of a driving transistor Q1 and GND, whereby a low frequency noise input into the base can be removed. As the driving transistor Q1, a transistor having a low hFE is used, whereby the low frequency noise input from a power source can be removed. A coil L3 is provided on the emitter side of an oscillating transistor Q2, whereby broadband frequency characteristics can be obtained to improve phase noise frequency characteristics. On the emitter side of the oscillating transistor Q2, a resonance frequency in a resonant circuit having a capacitor C7 and the coil L3 is set near the center of a VCO oscillation frequency band, whereby it is possible to obtain the oscillation frequency which is not easily influenced by the noise.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: April 3, 2012
    Assignee: Nihon Dempa Kogyo Co., Ltd
    Inventors: Yasuo Kitayama, Hiroyuki Demura
  • Publication number: 20100308929
    Abstract: A low noise voltage-controlled oscillating circuit which can remove a power source noise to improve low frequency noise characteristics is disclosed. A capacitor C11 is provided between a base of a driving transistor Q1 and GND, whereby a low frequency noise input into the base can be removed. As the driving transistor Q1, a transistor having a low hFE is used, whereby the low frequency noise input from a power source can be removed. A coil L3 is provided on the emitter side of an oscillating transistor Q2, whereby broadband frequency characteristics can be obtained to improve phase noise frequency characteristics. On the emitter side of the oscillating transistor Q2, a resonance frequency in a resonant circuit having a capacitor C7 and the coil L3 is set near the center of a VCO oscillation frequency band, whereby it is possible to obtain the oscillation frequency which is not easily influenced by the noise.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 9, 2010
    Inventors: Yasuo Kitayama, Hiroyuki Demura