Patents by Inventor Hiroyuki Dohata

Hiroyuki Dohata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080057783
    Abstract: A connecting board 1 includes a ground pattern 3, electrically connected, which is formed on a surface of the connecting board 1. The ground pattern 3, in which an outer conductor of a semi-rigid cable 2 is soldered, is larger than each of soldering sections 6 where soldering is carried out. On this connecting board 1, a slit 7 is formed by paring off a periphery of the soldering section 6 so that the ground pattern 3 is cut off. The outer conductor is soldered in an area of the ground pattern 3 which area is surrounded by the slit 7. This makes it possible to provide a coaxial cable connecting board onto which surface a coaxial cable can be directly soldered in a minimum essential area, a converter using the coaxial cable connecting board, and a high frequency apparatus using the coaxial cable connecting board.
    Type: Application
    Filed: August 15, 2007
    Publication date: March 6, 2008
    Inventor: Hiroyuki Dohata
  • Patent number: 7202017
    Abstract: A substrate includes a main substrate having a pattern as a first pattern layer on a main surface, a sub substrate having a dummy pattern as a second pattern layer on a main surface, a bridge (connection portion) connecting the main substrate and the sub substrate, and a thin portion provided on the bridge between the patterns. A multi-layer substrate is fabricated by laminating the main substrates separated from the sub substrate, and an LNB includes the multi-layer substrate.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: April 10, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroyuki Dohata
  • Patent number: 7154353
    Abstract: A plurality of signal lines are provided on one main surface of a dielectric substrate. A plurality of other signal lines are provided on the other main surface of dielectric substrate. The plurality of signal lines on one main surface and the plurality of other signal lines on the other main surface are provided so as to extend in parallel to one another. A ground pattern having its potential fixed is provided between neighboring signal lines on one main surface, and a ground pattern having its potential fixed is provided between neighboring signal lines on the other surface. According to such a structure, a microstrip line that can include a larger number of signal lines on the main surfaces of the dielectric substrate, without increasing a size of the dielectric substrate is obtained.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: December 26, 2006
    Inventor: Hiroyuki Dohata
  • Patent number: 7098851
    Abstract: A multi-layer substrate of the invention for a low noise block down converter includes an antenna pattern conveying electric wave signals that have been carried along a waveguide, and three ground conductive layers stacked on the antenna pattern with dielectric layers therebetween. In at least one ground conductive layer of the three ground conductive layers, conductor is absent in at least part of the region that is closer to the waveguide than the antenna pattern. This provides a multi-layer substrate for a low noise block down converter where deterioration in the passage property of electric wave signals can be restrained.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: August 29, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroyuki Dohata
  • Publication number: 20050206467
    Abstract: A plurality of signal lines are provided on one main surface of a dielectric substrate. A plurality of other signal lines are provided on the other main surface of dielectric substrate. The plurality of signal lines on one main surface and the plurality of other signal lines on the other main surface are provided so as to extend in parallel to one another. A ground pattern having its potential fixed is provided between neighboring signal lines on one main surface, and a ground pattern having its potential fixed is provided between neighboring signal lines on the other surface. According to such a structure, a microstrip line that can include a larger number of signal lines on the main surfaces of the dielectric substrate, without increasing a size of the dielectric substrate is obtained.
    Type: Application
    Filed: January 28, 2005
    Publication date: September 22, 2005
    Inventor: Hiroyuki Dohata
  • Publication number: 20050064342
    Abstract: A substrate includes a main substrate having a pattern as a first pattern layer on a main surface, a sub substrate having a dummy pattern as a second pattern layer on a main surface, a bridge (connection portion) connecting the main substrate and the sub substrate, and a thin portion provided on the bridge between the patterns. A multi-layer substrate is fabricated by laminating the main substrates separated from the sub substrate, and an LNB includes the multi-layer substrate.
    Type: Application
    Filed: July 22, 2004
    Publication date: March 24, 2005
    Inventor: Hiroyuki Dohata
  • Publication number: 20040189531
    Abstract: A multi-layer substrate of the invention for a low noise block down converter includes an antenna pattern conveying electric wave signals that have been carried along a waveguide, and three ground conductive layers stacked on the antenna pattern with dielectric layers therebetween. In at least one ground conductive layer of the three ground conductive layers, conductor is absent in at least part of the region that is closer to the waveguide than the antenna pattern. This provides a multi-layer substrate for a low noise block down converter where deterioration in the passage property of electric wave signals can be restrained.
    Type: Application
    Filed: January 22, 2004
    Publication date: September 30, 2004
    Inventor: Hiroyuki Dohata
  • Patent number: 6459339
    Abstract: In a high-frequency circuit having bias lines that cross a microstrip line in a plan view, portions of the bias lines are formed on a reverse side of a substrate without forming, in the microstrip line, capacitors required for separating the bias lines from each other as an independent DC line, thus contributing to miniaturizing the high-frequency circuit.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: October 1, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroyuki Dohata
  • Publication number: 20020063600
    Abstract: In a high-frequency circuit having bias lines that cross a microstrip line in a plan view, portions of the bias lines are formed on a reverse side of a substrate without forming, in the microstrip line, capacitors required for separating the bias lines from each other as an independent DC line, thus contributing to miniaturizing the high-frequency circuit.
    Type: Application
    Filed: November 6, 2001
    Publication date: May 30, 2002
    Inventor: Hiroyuki Dohata