Abstract: A semiconductor device includes an AlGaN film formed on a GaN film on a substrate, a gate electrode formed on the AlGaN film, and source and drain electrodes formed on either side of the gate electrode on the AlGaN film. An n-type InxGayAl1-x-yN film is interposed between the source and drain electrodes and the AlGaN film. Alternatively, the semiconductor device includes an n-type InxGayAl1-x-yN film formed on a GaN film on a substrate, a gate electrode formed on the InxGayAl1-x-yN film, and source and drain electrodes formed on either side of the gate electrode on the InxGayAl1-x-yN film.

Abstract: An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.

Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein surfaces of the buffer layer are c facets of Ga atoms; a separating layer including (InXAl1-X)YGa1-YN (where 0≦X≦1, 0≦Y≦1) formed on the buffer layer, wherein surfaces of the separating layer are c facets of In, Al, or Ga atoms; a channel layer including GaN, InGaN, or a combination of GaN and InGaN formed on the separating layer, wherein surfaces of the channel layer are c facets of Ga or In atoms; and an electron supply layer including AlGaN formed on the channel layer, wherein surfaces of the electron supply layer are c facets of Al or Ga atoms, wherein the AlN composition ratio in the separating layer is smaller than the AlN composition ratio in the electron supply layer.

Abstract: A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.

Abstract: A semiconductor device having a single substrate made of silicon carbide; an epitaxial film made of AlxInyGa(1−x−y)N which is selectively formed on the single substrate; an amplifier section including a gate formed on the single substrate and a source layer and a drain layer which are formed within the single substrate; and another amplifier section formed on the epitaxial film.

Abstract: A first metal film and a second metal film, both of which are made of Ni or the like, are deposited on the upper surface of a substrate made of SiC. In such a state, the interface between the first metal film and the substrate and the interface between the second metal film and the substrate both form a Schottky contact. Next, laser light is irradiated from above the upper surface of the substrate only onto the first metal film on the substrate after the diameter of the top end of the laser light has been reduced. Thus, since the metal-semiconductor interface between the first metal film and the substrate is turned into an alloy owing to the energy of the laser light without heating the entire substrate, an ohmic contact can be formed in the interface between the first metal film and the substrate. As a result, an ohmic electrode can be constituted by the first metal film.

Abstract: A conductive layer made of n-type GaAs is formed on a semi-insulating substrate made of GaAs. A pair of contact regions made of n.sup.+ -type GaAs are formed on the conductive layer. A source electrode is formed on the left-hand contact region, while a drain electrode is formed on the right-hand contact region. A gate recessed region is formed in the region of the conductive layer located between the pair of contact regions so that a gate electrode is formed on the gate recessed region. A depressed portion is formed in the gate recessed region of the conductive layer. The wall face of the depressed portion closer to the gate electrode is flush with or protruding from the side face of the gate electrode facing the drain electrode.

Abstract: A channel layer made of n-type GaAs doped with Si, a hole absorption layer made of InGaAs having a valance band higher in energy level than that of GaAs, and an undoped layer made of GaAs are formed sequentially on a semi-insulating substrate made of GaAs. A gate recess region having a pair of sidewall portions each consisting of an upper sidewall composed of the undoped layer and a lower sidewall composed of the hole absorption layer is formed on the channel region. The channel region is exposed in the gate recess region. An indent having an undercut configuration is formed in the lower sidewall of the gate recess region. A gate electrode is formed to extend over a stepped portion composed of the sidewall portion of the gate recess region closer to a drain electrode.

Abstract: After forming an n-type active layer, an n.sup.+ -type source region and an n.sup.+ -type drain region at predetermined regions of a GaAs substrate, a silicon oxide film and a silicon nitride film are deposited, and then source and drain electrodes are formed. By effecting overetching on the silicon nitride film using a resist mask formed on the silicon nitride film, an upper layer portion of the silicon oxide film at a gate electrode formation region is removed, and a carrier concentration at the active layer immediately under the gate electrode is reduced. This improves a gate/drain breakdown voltage. Thereafter, a lower layer portion of the silicon oxide film at the gate formation region is removed by wet etching, and the gate electrode is formed at this removed region. A drain breakdown voltage is improved owing to reduction of the carrier concentration only at the surface region of the active layer immediately under the gate electrode.

Abstract: On a semi-insulating substrate is formed a conductive layer and an undoped layer. On specified regions of the conductive layer are formed ohmic electrodes, each serving as a source electrode or a drain electrode, via a pair of square contact regions. The circumferential edges of the contact regions are undercut beneath the ohmic electrodes. Between the pair of contact regions on the conductive layer is formed a gate electrode by self alignment using the ohmic electrodes as a mask. The gate electrode has extended in the direction of gate width and the extended portion serves as a withdrawn portion of the gate electrode. Upper electrodes are formed by self alignment in the same process in which the gate electrode is formed.

Abstract: A heterojunction FET comprises: a semi-insulation GaAs substrate; and a heterojunction structure, formed on the substrate, having: an active layer including: an undoped InGaAs layer including 10-254 of InAs composition; an undoped GaAs layer formed on the undoped InGaAs layer on the opposite side of the substrate; first and second AlGaAs layers doped with first and second dopants respectively, sandwiching the active layer, the second AlGaAs layer being provided between said active layer and the substrate; and source, gate, and drain electrodes on the heterojunction structure. A first density of the first dopant may be lower than a second density of the second dopant. The first and second dopant may be p or n type. The AlAs composition of the first AlGaAs layer may be lower than that of the second AlGaAs layer. First and second undoped AlGaAs layers sandwiched between the active layer and the first AlGaAs layer and sandwiched between the active layer and the second AlGaAs layer respectively may be provided.