Abstract: A column electrode driving semiconductor integrated circuit for driving column electrodes in a liquid crystal display device to be driven by a multiple line selection method wherein the liquid crystal display device has a select and output circuit which selects a specified voltage value among voltage values having the member of levels corresponding to the member of simultaneously selected row electrodes, and applies the selected voltage value to each column electrode, wherein a memory unit including a control circuit stores display data and outputs the data on each row electrode in simultaneously selected lines, and an arithmetic circuit unit including an arithmetic processing circuit receives the data outputted from the memory unit and selection data indicating a voltage pattern applied to a selected row electrode and produces by arithmetic processing information of voltages selected by the select and output circuit unit.

Abstract: A driving method for a direct addressing type liquid crystal display device for displaying gradation by changing the amplitude of voltages applied to pixels, wherein a series of voltage pulses, as signal voltages, composed of a plurality of different voltage levels are applied in order to display a specified gradation, and for a display, a plurality kinds of gradation in which a part of the voltage levels is commonly used are selected.

Abstract: A semiconductor device for a liquid crystal panel driving power supply in which a first reference voltage is converted in impedance by an operational amplifier to output it as a second reference voltage, comprising control means wherein, in a suitable fixed period during a period of displaying a liquid crystal, the current supply capacity of said operational amplifier is enhanced, and, in another period during said period of displaying a liquid crystal, the current supply capacity of said operational amplifier is lowered.

Abstract: A plurality of resistors serially connected with each other between a maximum voltage level "V" and a minimum voltage level "0" are provided to generate voltage-divided intermediate voltage levels "V2H", "V1H", "V3L", "V2L", the voltages having the voltage-divided intermediate voltage levels being supplied to a first group of operational amplifiers whose first stage input portions are formed of N-channel MOSFETs and a second group of operational amplifiers whose first stage input portions are formed of P-channel MOSFETs. Frame signal FR for alternating-current-driving a liquid crystal display device is supplied to the operational amplifiers. When signal FR is in a state "0", the first group of operational amplifiers are brought into an active state while the second group is brought into an inactive state. When signal FR is in a state "1", the first group of operational amplifiers are inactive.

Abstract: A random access memory (RAM) array has a dummy word line having a similar pattern to the word lines provided for the RAM cells. A transistor having the same channel width and channel length as one of the transistors in the RAM cells has its gate connected to the dummy word line. An inverter is formed of three transistors including the transistor having its gate connected to the dummy word line, with the output of the inverter connected to a capacitor. The capacitance of the capacitor is set close to the capacitance of a bus line of the RAM to adjust the dummy word line and the word lines of the RAM circuits to have the same transfer delay. If the capacitance of the capacitor is made slightly smaller than the bus line capacitance, the potential at the output of the inverter can be changed by this difference. The output of the inverter is detected, and can be used as a drive signal to drive a sense amplifier used to read the RAM cells.

Abstract: A variable delay circuit delays an input signal by an amount corresponding to a control signal. A signal delay amount of the variable delay circuit is detected by a delay amount detector circuit, and the detection signal is supplied to a charge pump circuit. In the charge pump circuit 12, a DC voltage according to a pulse width ratio of the input signal to an detection output from the delay amount detector circuit is generated and fed back to the variable delay circuit as the control signal. A predetermined DC voltage output from an initial voltage setting circuit is applied to a path of the control signal output from the charge pump circuit 12. An output voltage from the initial voltage setting circuit is set to be an approximate value of a value such that a desired delay amount is obtained in each of delay stages of the variable delay circuit, and the initial voltage setting circuit sets an initial value of the control signal.

Abstract: A delay circuit delays an input signal having a predetermined frequency by a time corresponding to a control signal. A delay amount detector detects a signal delay amount of the delay circuit. A charge pump circuit generates a DC voltage corresponding to a pulse width ratio between the input signal and a detection signal of the delay amount detector. This DC voltage is fed back to the delay circuit as a control signal.

Abstract: A voltage controlled oscillator (VCO) is controlled by a separate phase locked loop (PLL). The PLL includes a first variable delay circuit of m stages which receives a reference frequency signal and produces a delayed signal which is compared in a phase comparator with the reference frequency signal. A first control signal generating circuit in the PLL receives the output of the phase comparator and a reference voltage to produce a first control signal for controlling the delay of the first variable delay circuit. The VCO contains a ring oscillator formed of a second variable delay circuit of n stages similar to those of the first variable delay circuit. A second control signal generating circuit in the VCO receives the output of the phase comparator and a control voltage to produce a second control signal for controlling the delay of the second variable delay circuit to thereby control the output frequency of the VCO.