Patents by Inventor Hiroyuki Sada
Hiroyuki Sada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11735435Abstract: A quad flat no lead (“QFN”) package that includes a die having an active side positioned substantially in a first plane and a backside positioned substantially in a second plane parallel to the first plane; a plurality of separate conductive pads each having a first side positioned substantially in the first plane and a second side positioned substantially in the second plane; and mold compound positioned between the first and second planes in voids between the conductive pads and the dies. Also a method of producing a plurality of QFN packages includes forming a strip of plastic material having embedded therein a plurality of dies and a plurality of conductive pads that are wire bonded to the dies and singulating the strip into a plurality of QFN packages by cutting through only the plastic material.Type: GrantFiled: April 20, 2020Date of Patent: August 22, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dan Okamoto, Hiroyuki Sada
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Publication number: 20230260839Abstract: A semiconductor die includes a substrate having a semiconductor surface layer bon a front side with active circuitry including at last one transistor therein and a back side. The sidewall edges of the semiconductor die have at least one damage region pair including an angled damage feature region relative to a surface normal of the semiconductor die that is above a damage region that is more normal to the surface normal of the die as compared to the angled damage feature region.Type: ApplicationFiled: April 24, 2023Publication date: August 17, 2023Inventors: MATTHEW JOHN SHERBIN, MICHAEL TODD WYANT, CHRISTOPHER DANIEL MANACK, HIROYUKI SADA, SHOICHI IRIGUCHI, GENKI YANO, MING ZHU, JOSEPH O. LIU
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Patent number: 11664276Abstract: A semiconductor die includes a substrate having a semiconductor surface layer bon a front side with active circuitry including at last one transistor therein and a back side. The sidewall edges of the semiconductor die have at least one damage region pair including an angled damage feature region relative to a surface normal of the semiconductor die that is above a damage region that is more normal to the surface normal of the die as compared to the angled damage feature region.Type: GrantFiled: November 30, 2018Date of Patent: May 30, 2023Assignee: Texas Instruments IncorporatedInventors: Matthew John Sherbin, Michael Todd Wyant, Christopher Daniel Manack, Hiroyuki Sada, Shoichi Iriguchi, Genki Yano, Ming Zhu, Joseph O. Liu
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Patent number: 11367699Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: GrantFiled: September 1, 2020Date of Patent: June 21, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hiroyuki Sada, Shoichi Iriguchi, Genki Yano, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar, Yi Yan, Hau Nguyen
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Patent number: 11171031Abstract: A die matrix expander includes a subring including ?3 pieces, and a wafer frame supporting a dicing tape having an indentation for receiving pieces of the subring. The subring prior to expansion sits below a level of the wafer frame and has an outer diameter <an inner diameter of the wafer frame. A translation guide coupled to the subring driven by mechanical force applier moves the subring pieces in an angled path upwards and outwards for stretching the dicing tape including to a top most stretched position above the wafer frame that is over or outside the wafer frame. A cap placed on the pieces of the subring after being fully expanded over the dicing tape locks the dicing tape in the top most stretched position and secures the pieces of the expanded subring in place including when within the indentation during an additional expansion during a subsequent die pick operation.Type: GrantFiled: July 23, 2018Date of Patent: November 9, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Matthew John Sherbin, Michael Todd Wyant, Dave Charles Stepniak, Hiroyuki Sada, Shoichi Iriguchi, Genki Yano
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Publication number: 20210215965Abstract: A display device includes a display panel that has a display surface, a first panel supporting portion that faces the display surface in a normal direction to the display surface with respect to an outer edge of the display panel and that is capable of supporting the outer edge, a second panel supporting portion that faces a side opposite to the display surface in the normal direction with respect to the outer edge and that is capable of supporting the outer edge, and a panel-end-surface-facing portion that is interposed between the first panel supporting portion and the second panel supporting portion in the normal direction and that faces an end surface of the display panel, at least a part of a facing surface that faces the end surface of the display panel being an inclined surface that is inclined with respect to the normal direction.Type: ApplicationFiled: January 8, 2021Publication date: July 15, 2021Inventors: HIROAKI ISOBE, HIROMITSU TSUTSUI, KATSUHIKO HIGASHI, HIROYUKI SADA
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Publication number: 20210035932Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: ApplicationFiled: September 1, 2020Publication date: February 4, 2021Inventors: Hiroyuki SADA, Shoichi IRIGUCHI, Genki YANO, Luu Thanh NGUYEN, Ashok PRABHU, Anindya PODDAR, Yi YAN, Hau NGUYEN
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Patent number: 10763230Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: GrantFiled: December 21, 2018Date of Patent: September 1, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hiroyuki Sada, Shoichi Iriguchi, Genki Yano, Luu Thanh Nguyen, Ashok Prabhu, Anindya Poddar, Yi Yan, Hau Nguyen
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Publication number: 20200251352Abstract: A quad flat no lead (“QFN”) package that includes a die having an active side positioned substantially in a first plane and a backside positioned substantially in a second plane parallel to the first plane; a plurality of separate conductive pads each having a first side positioned substantially in the first plane and a second side positioned substantially in the second plane; and mold compound positioned between the first and second planes in voids between the conductive pads and the dies. Also a method of producing a plurality of QFN packages includes forming a strip of plastic material having embedded therein a plurality of dies and a plurality of conductive pads that are wire bonded to the dies and singulating the strip into a plurality of QFN packages by cutting through only the plastic material.Type: ApplicationFiled: April 20, 2020Publication date: August 6, 2020Inventors: Dan Okamoto, Hiroyuki Sada
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Publication number: 20200203295Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.Type: ApplicationFiled: December 21, 2018Publication date: June 25, 2020Inventors: Hiroyuki SADA, Shoichi IRIGUCHI, Genki YANO, Luu Thanh NGUYEN, Ashok PRABHU, Anindya PODDAR, Yi YAN, Hau NGUYEN
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Publication number: 20200176314Abstract: A semiconductor die includes a substrate having a semiconductor surface layer bon a front side with active circuitry including at last one transistor therein and a back side. The sidewall edges of the semiconductor die have at least one damage region pair including an angled damage feature region relative to a surface normal of the semiconductor die that is above a damage region that is more normal to the surface normal of the die as compared to the angled damage feature region.Type: ApplicationFiled: November 30, 2018Publication date: June 4, 2020Inventors: MATTHEW JOHN SHERBIN, MICHAEL TODD WYANT, CHRISTOPHER DANIEL MANACK, HIROYUKI SADA, SHOICHI IRIGUCHI, GENKI YANO, MING ZHU, JOSEPH O. LIU
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Patent number: 10665475Abstract: A quad flat no lead (“QFN”) package that includes a die having an active side positioned substantially in a first plane and a backside positioned substantially in a second plane parallel to the first plane; a plurality of separate conductive pads each having a first side positioned substantially in the first plane and a second side positioned substantially in the second plane; and mold compound positioned between the first and second planes in voids between the conductive pads and the dies. Also a method of producing a plurality of QFN packages includes forming a strip of plastic material having embedded therein a plurality of dies and a plurality of conductive pads that are wire bonded to the dies and singulating the strip into a plurality of QFN packages by cutting through only the plastic material.Type: GrantFiled: June 11, 2014Date of Patent: May 26, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dan Okamoto, Hiroyuki Sada
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Patent number: 10658240Abstract: In a described example, a method includes: forming stress induced dislocations along scribe lanes between semiconductor dies on a semiconductor wafer using a laser; mounting a first side of the semiconductor wafer on the first side of a first dicing tape; removing a backgrinding tape from the semiconductor wafer; attaching a second dicing tape to a second side of the semiconductor wafer opposite the first side, the second dicing tape adhering to portions of the first dicing tape that are spaced from the semiconductor wafer, forming a dual taped wafer dicing assembly; separating the semiconductor dies by stretching the first dicing tape and stretching the second dicing tape; removing the second dicing tape from the semiconductor dies; and removing the semiconductor dies from the first dicing tape.Type: GrantFiled: March 4, 2019Date of Patent: May 19, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shoichi Iriguchi, Hiroyuki Sada, Genki Yano
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Publication number: 20200027772Abstract: A die matrix expander includes a subring including ?3 pieces, and a wafer frame supporting a dicing tape having an indentation for receiving pieces of the subring. The subring prior to expansion sits below a level of the wafer frame and has an outer diameter <an inner diameter of the wafer frame. A translation guide coupled to the subring driven by mechanical force applier moves the subring pieces in an angled path upwards and outwards for stretching the dicing tape including to a top most stretched position above the wafer frame that is over or outside the wafer frame. A cap placed on the pieces of the subring after being fully expanded over the dicing tape locks the dicing tape in the top most stretched position and secures the pieces of the expanded subring in place including when within the indentation during an additional expansion during a subsequent die pick operation.Type: ApplicationFiled: July 23, 2018Publication date: January 23, 2020Inventors: MATTHEW JOHN SHERBIN, MICHAEL TODD WYANT, DAVE CHARLES STEPNIAK, HIROYUKI SADA, SHOICHI IRIGUCHI, GENKI YANO
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Patent number: 9868502Abstract: In a stern tube sealing device, slurry contained in outboard water is suppressed from depositing on sliding portions between a wall surface of a seal ring chamber or an outer peripheral surface of a propeller shaft and a sealing surface of a seal ring. A first seal ring (121) is arranged in a first seal ring chamber (111), and a second seal ring (122) is arranged in a second seal ring chamber (112) which is formed at an inboard side of the first seal ring chamber. The first seal ring chamber and the second seal ring chamber are in communication with each other through the sliding portions between a wall surface of the first seal ring chamber and a sealing surface (121a) of the first seal ring. Outboard water is filled into the first seal ring chamber, and clear water is filled into the second seal ring chamber.Type: GrantFiled: July 8, 2013Date of Patent: January 16, 2018Assignee: EAGLE INDUSTRY CO., LTD.Inventors: Kenichi Saito, Hiroyuki Sada
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Publication number: 20150364373Abstract: A quad flat no lead (“QFN”) package that includes a die having an active side positioned substantially in a first plane and a backside positioned substantially in a second plane parallel to the first plane; a plurality of separate conductive pads each having a first side positioned substantially in the first plane and a second side positioned substantially in the second plane; and mold compound positioned between the first and second planes in voids between the conductive pads and the dies. Also a method of producing a plurality of QFN packages includes forming a strip of plastic material having embedded therein a plurality of dies and a plurality of conductive pads that are wire bonded to the dies and singulating the strip into a plurality of QFN packages by cutting through only the plastic material.Type: ApplicationFiled: June 11, 2014Publication date: December 17, 2015Inventors: Dan Okamoto, Hiroyuki Sada
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Publication number: 20150137458Abstract: In a stern tube sealing device, slurry contained in outboard water is suppressed from depositing on sliding portions between a wall surface of a seal ring chamber or an outer peripheral surface of a propeller shaft and a sealing surface of a seal ring. A first seal ring (121) is arranged in a first seal ring chamber (111), and a second seal ring (122) is arranged in a second seal ring chamber (112) which is formed at an inboard side of the first seal ring chamber. The first seal ring chamber and the second seal ring chamber are in communication with each other through the sliding portions between a wall surface of the first seal ring chamber and a sealing surface (121a) of the first seal ring. Outboard water is filled into the first seal ring chamber, and clear water is filled into the second seal ring chamber.Type: ApplicationFiled: July 8, 2013Publication date: May 21, 2015Applicant: EAGLE INDUSTRY CO., LTD.Inventors: Kenichi Saito, Hiroyuki Sada
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Patent number: 6330500Abstract: In an air bag system of the type that inflates one air bag using a plurality of inflators, an air bag inflation control apparatus is provided that can make a proper determination of inflator activation mode and a correct decision to activate or not activate the inflators according to the severity of a collision.Type: GrantFiled: February 14, 2000Date of Patent: December 11, 2001Assignee: Autoliv Japan., Ltd.Inventors: Hiroshi Moriyama, Mitsuru Ono, Hiroyuki Sada
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Patent number: 5900807Abstract: The collision detection device for appropriately actuating two or more types of passenger safety devices (5,6,7,8) which are installed on a vehicle and respectively have different performances depending on collision types such as a front collision and a side collision, and comprising two acceleration sensors (S1,S2) installed respectively in different directions and a controller for selecting appropriate passenger safety devices to be actuated from said plurality of passenger safety devices in accordance with a direction of a collision when recognizing the collision on the basis of accelerations detected by the two acceleration sensors, and for actuating them, said controller (4) having collision detecting axes related with said passenger safety devices respectively, said collision detecting axes preset in directions assumed as directions for detecting the collision which are front, right and left directions and further at least one additional directions which are different from said front, right and left dirType: GrantFiled: October 14, 1997Date of Patent: May 4, 1999Assignee: Sensor Technology Co., Ltd.Inventors: Hiroshi Moriyama, Hiroyuki Sada
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Patent number: 5777225Abstract: A crash sensor including an accelerometer, a calculation device, a comparator, a trigger circuit, a physical quantity calculation device, and an adjusting device. The accelerometer develops an acceleration signal and the calculation device calculates a first value corresponding to a magnitude of deceleration based on the acceleration signal. The comparator compares the first value and the trigger circuit actuates a protective device, such as an air bag, upon receiving the trigger signal from the trigger circuit. The physical quantity calculation device calculates a magnitude of physical quantities in a wave defined by acceleration signals during an initial stage of a crash. The adjusting device adjusts at least one of the first value corresponding to the magnitude of deceleration and the threshold value used by the comparator on a basis of the magnitude of physical quantities.Type: GrantFiled: June 24, 1996Date of Patent: July 7, 1998Assignee: Sensor Technology Co., Ltd.Inventors: Hiroyuki Sada, Hiroshi Moriyama