Patents by Inventor Hiroyuki Souma

Hiroyuki Souma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8558630
    Abstract: An amplifier circuit for amplifying output signal from the crystal oscillator circuit is connected to the output side of the crystal oscillator circuit. The amplifier circuit amplifies the difference between the output voltage of the crystal oscillator circuit and the input voltage of a CMOS inverter of the crystal oscillator circuit. For example, a differential amplifier is connected to the output side of the crystal oscillator circuit, then the output voltage of the crystal oscillator circuit and the input voltage of the CMOS inverter are connected to the inputs of the differential amplifier.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 15, 2013
    Assignee: Seiko Instruments Inc.
    Inventor: Hiroyuki Souma
  • Publication number: 20120229149
    Abstract: It is an object of the present invention to provide a method for determining the load capacitance CL of an oscillator circuit having a low load capacitance. To attain the object, we provide a method for determining the load capacitance CL of an oscillator circuit, wherein, when a drive current and a load capacitance of the oscillator circuit with a negative resistance RL1 are Ios1 and CL1, respectively, a load capacitance CL2 for changing the drive current of the oscillator circuit to Ios2 (<Ios1) is given by: CL2=CL1*(Ios2/Ios1)1/2.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 13, 2012
    Inventor: Hiroyuki Souma
  • Publication number: 20120223783
    Abstract: An amplifier circuit for amplifying output signal from the crystal oscillator circuit is connected to the output side of the crystal oscillator circuit. The amplifier circuit amplifies the difference between the output voltage of the crystal oscillator circuit and the input voltage of a CMOS inverter of the crystal oscillator circuit. For example, a differential amplifier is connected to the output side of the crystal oscillator circuit, then the output voltage of the crystal oscillator circuit and the input voltage of the CMOS inverter are connected to the inputs of the differential amplifier.
    Type: Application
    Filed: February 16, 2012
    Publication date: September 6, 2012
    Inventor: Hiroyuki Souma
  • Publication number: 20120212299
    Abstract: According to the invention, two of three design values, i.e., the negative resistance RL, load capacitance CL and drive current Ios of a crystal oscillator circuit including a crystal resonator are determined to determine the remaining one design value from a relation equation or relation graph. As a result, reducing the CL of the crystal oscillator circuit allows the drive current Ios to be reduced, achieving reduced power consumption of the crystal oscillator circuit.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 23, 2012
    Inventor: Hiroyuki Souma
  • Publication number: 20120194284
    Abstract: There is provided an oscillation circuit including a crystal vibrator that is connected between input and output terminals of a CMOS inverter making up the oscillation circuit; an input wiring line that includes a crystal vibrator-side input terminal connected to an input terminal pad of the CMOS inverter; an output wiring line that includes a crystal vibrator-side output terminal connected to an output terminal pad of the CMOS inverter; a ground power source wiring line that includes a crystal vibrator-side ground power source terminal; and a capacitative element that is connected between the input wiring line and the ground power source wiring line, and between the output wiring line and the ground power source wiring line, wherein the ground power source wiring line is disposed at least a part of between the input wiring line and the output wiring line.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 2, 2012
    Inventor: Hiroyuki Souma
  • Publication number: 20120197568
    Abstract: There is provided an oscillation circuit using a crystal vibrator including means A for obtaining an oscillation activation time Ts (Ts0) from an oscillation margin M by using a relational equation between the oscillation activation time Ts and the oscillation margin M or a relational graph thereof; means B for obtaining a relational equation between the oscillation activation time Ts and a load capacitance CL in an arbitrary driving current value Ios from the relational equation between the oscillation activation time Ts and the load capacitance CL, and the driving current value Ios; and means C for determining the load capacitance CL corresponding to the oscillation activation time Ts0 obtained by the means A, by using the relational equation between the oscillation activation time Ts and the load capacitance CL, which is obtained by the means B.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 2, 2012
    Inventor: Hiroyuki Souma
  • Publication number: 20110163821
    Abstract: In a circuit including a CMOS inverter (inverting amplifier) (IV02), a floating capacitance resulting from the circuit and peripheral interconnections thereof is Cs, a capacitive element (Cg) is connected to the input side of the CMOS inverter (inverting amplifier) (IV02), a capacitive element (Cd) is connected to the output side thereof, and the capacitances of the capacitive element (Cg) and the capacitive element (Cd) are determined (tuned) so that a load capacitance (CL) of a piezoelectric vibrator (X2) satisfies a relational expression “CL=Cs+Cg×Cd/(Cg+Cd)”. By determining the capacitances of the capacitive element (Cg) and the capacitive element (Cd) in this way, it is possible to improve the oscillation frequency stability with respect to a variation in capacitance value of the load capacitance (CL) in a region of a low load capacitance (CL) (for example, 3 pF).
    Type: Application
    Filed: March 15, 2011
    Publication date: July 7, 2011
    Inventors: Hiroyuki Souma, Seigo Fukuchi, Satoshi Shimizu
  • Publication number: 20040213223
    Abstract: A communication apparatus capable of being connected to networks of a plurality of types, comprising a network discrimination table for discriminating an incoming network of a call setup message, a routing table for selecting an outgoing network of the call setup message, and a control unit for rewriting the contents of an address field and a sub-address field of the received call setup message on the basis of the routing table and transmitting the resultant message to the outgoing network.
    Type: Application
    Filed: February 12, 2001
    Publication date: October 28, 2004
    Inventors: Mitsumasa Mori, Toshihiko Ogura, Toshimichi Noake, Toshiki Ichikawa, Hiroyuki Souma