Patents by Inventor Hiroyuki Takaba
Hiroyuki Takaba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11538900Abstract: A semiconductor device includes a landing pad and a capacitor disposed on and electrically connected to the landing pad. The capacitor includes a cylindrical bottom electrode, a dielectric layer and a top electrode. The cylindrical bottom electrode is disposed on an in contact with the landing pads, wherein an inner surface the cylindrical bottom electrode includes a plurality of protruding portions, and an outer surface of the cylindrical bottom electrode includes a plurality of concaved portions. The dielectric layer is conformally disposed on the inner surface and the outer surface of the cylindrical bottom electrode, and covering the protruding portions and the concaved portions. The top electrode is conformally disposed on the dielectric layer over the inner surface and the outer surface of the cylindrical bottom electrode.Type: GrantFiled: June 8, 2021Date of Patent: December 27, 2022Assignee: Winbond Electronics Corp.Inventor: Hiroyuki Takaba
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Publication number: 20220392996Abstract: A semiconductor device includes a landing pad and a capacitor disposed on and electrically connected to the landing pad. The capacitor includes a cylindrical bottom electrode, a dielectric layer and a top electrode. The cylindrical bottom electrode is disposed on an in contact with the landing pads, wherein an inner surface the cylindrical bottom electrode includes a plurality of protruding portions, and an outer surface of the cylindrical bottom electrode includes a plurality of concaved portions. The dielectric layer is conformally disposed on the inner surface and the outer surface of the cylindrical bottom electrode, and covering the protruding portions and the concaved portions. The top electrode is conformally disposed on the dielectric layer over the inner surface and the outer surface of the cylindrical bottom electrode.Type: ApplicationFiled: June 8, 2021Publication date: December 8, 2022Applicant: Winbond Electronics Corp.Inventor: Hiroyuki Takaba
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Patent number: 9721803Abstract: In one embodiment of the present invention, an etching method for a substrate to be processed comprises: (a1) a step in which etchant gas is supplied into a processing container than accommodates a substrate to be processed; (b1) a step in which the inside of the processing container is evacuated; (c1) a step in which a noble gas is supplied into the processing container; and (d1) a step in which microwaves are supplied into the processing container so as to excite the plasma of the noble gas inside the processing container. The sequential process including the step of supplying the etchant of supplying the etchant gas, the evacuating step, the step of supplying the noble gas, and the step of exciting the plasma of the noble gas may be repeated.Type: GrantFiled: April 10, 2013Date of Patent: August 1, 2017Assignee: TOKYO ELECTRON LIMITEDInventor: Hiroyuki Takaba
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Patent number: 9293346Abstract: In a method for etching an organic film according to an embodiment, a target object that has an organic film is set in a processing chamber. Then, a processing gas containing COS gas and O2 gas is supplied to the processing chamber and a microwave for plasma excitation is supplied to the inside of the processing chamber to etch the organic film.Type: GrantFiled: March 26, 2013Date of Patent: March 22, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroyuki Takaba, Hironori Matsuoka
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Publication number: 20150294839Abstract: Disclosed is a plasma processing apparatus including a processing container, a placing table, a central introduction section, and a peripheral introduction section. The central introduction section is provided above the placing table. The central introduction introduces a gas toward the placing table along the axis passing through a center of the placing table. The peripheral introduction section is provided between the central introduction section and a top surface of the placing table in a height direction. In addition, the peripheral introduction section is formed along a side wall. The peripheral introduction section provides a plurality of gas ejection ports arranged in a circumferential direction with respect to the axis. The plurality of gas ejection ports of the peripheral introduction section extend away from the placing table as the gas ejection ports come close to the axis.Type: ApplicationFiled: April 8, 2015Publication date: October 15, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Hiroyuki TAKABA, Tetsuya NISHIZUKA, Naoki MATSUMOTO, Michitaka AITA, Takashi MINAKAWA, Kazuki TAKAHASHI, Jun YOSHIKAWA, Motoshi FUKUDOME, Naoki MIHARA, Hiroyuki KONDO
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Publication number: 20150118858Abstract: In one embodiment of the present invention, an etching method for a substrate to be processed comprises: (a1) a step in which etchant gas is supplied into a processing container than accommodates a substrate to be processed; (b1) a step in which the inside of the processing container is evacuated; (c1) a step in which a noble gas is supplied into the processing container; and (d1) a step in which microwaves are supplied into the processing container so as to excite the plasma of the noble gas inside the processing container. The sequential process including the step of supplying the etchant of supplying the etchant gas, the evacuating step, the step of supplying the noble gas, and the step of exciting the plasma of the noble gas may be repeated.Type: ApplicationFiled: April 10, 2013Publication date: April 30, 2015Inventor: Hiroyuki Takaba
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Publication number: 20150064924Abstract: In a method for etching an organic film according to an embodiment, a target object that has an organic film is set in a processing chamber. Then, a processing gas containing COS gas and O2 gas is supplied to the processing chamber and a microwave for plasma excitation is supplied to the inside of the processing chamber to etch the organic film.Type: ApplicationFiled: March 26, 2013Publication date: March 5, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Hiroyuki Takaba, Hironori Matsuoka
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Patent number: 8962454Abstract: Embodiments of the invention describe a method for forming dielectric films for semiconductor devices. The method includes providing a substrate in a process chamber containing a microwave plasma source, introducing into the process chamber a non-metal-containing process gas including a deposition gas having a carbon-nitrogen intermolecular bond, forming a plasma from the process gas, and exposing the substrate to the plasma to deposit carbon-nitrogen-containing film on the substrate. In some embodiments, the carbon-nitrogen-containing film can include a CN film, a CNO film, a Si-doped CN film, or a Si-doped CNO film.Type: GrantFiled: March 28, 2011Date of Patent: February 24, 2015Assignee: Tokyo Electron LimitedInventor: Hiroyuki Takaba
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Patent number: 8778810Abstract: A method for manufacturing a semiconductor device having fluorocarbon layers as insulating layers includes the steps of forming a first fluorocarbon (CFx1) layer using plasma excited by microwave power and forming a second fluorocarbon (CFx2) layer using plasma excited by an RF power.Type: GrantFiled: June 25, 2010Date of Patent: July 15, 2014Assignee: Tokyo Electron LimitedInventor: Hiroyuki Takaba
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Patent number: 8419859Abstract: A method of cleaning a plasma processing apparatus for processing a target in a process container, which is vacuum-evacuatable, using plasma, includes performing a first cleaning process by supplying a cleaning gas into the process container to generate plasma and maintaining the pressure in the process container at a first pressure, and performing a second cleaning process by supplying a cleaning gas into the process container to generate plasma and maintaining the pressure in the process container at a second pressure that is higher than the first pressure. Accordingly, the plasma processing apparatus can be efficiently and rapidly cleaned without damaging at least one of the group consisting of inner surfaces of the process container and members in the process container.Type: GrantFiled: February 18, 2008Date of Patent: April 16, 2013Assignee: Tokyo Electron LimitedInventors: Noriaki Fukiage, Shinji Komoto, Hiroyuki Takaba, Kiyotaka Ishibashi
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Patent number: 8399366Abstract: A method is provided for forming a semiconductor device. The method includes providing a substrate on a substrate holder in a process chamber, where the substrate contains a raised feature having a top surface and a sidewall surface, and flowing a process gas into the process chamber, where the process gas contains a hydrocarbon gas, an oxygen-containing gas, and optionally argon or helium. The method further includes maintaining a process gas pressure of at least 1 Torr in the process chamber, forming a plasma from the process gas using a microwave plasma source, and exposing the substrate to the plasma to deposit a conformal amorphous carbon film over the surfaces of the raised feature.Type: GrantFiled: August 25, 2011Date of Patent: March 19, 2013Assignee: Tokyo Electron LimitedInventor: Hiroyuki Takaba
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Publication number: 20130052808Abstract: A method is provided for forming a semiconductor device. The method includes providing a substrate on a substrate holder in a process chamber, where the substrate contains a raised feature having a top surface and a sidewall surface, and flowing a process gas into the process chamber, where the process gas contains a hydrocarbon gas, an oxygen-containing gas, and optionally argon or helium. The method further includes maintaining a process gas pressure of at least 1 Torr in the process chamber, forming a plasma from the process gas using a microwave plasma source, and exposing the substrate to the plasma to deposit a conformal amorphous carbon film over the surfaces of the raised feature.Type: ApplicationFiled: August 25, 2011Publication date: February 28, 2013Applicant: TOKYO ELECTRON LIMITEDInventor: Hiroyuki Takaba
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Publication number: 20130034970Abstract: A method for forming a fluorocarbon layer using a plasma reaction process includes the step of applying a microwave power and an RF bias. The microwave power and the RF bias are applied under a pressure ranging from 20 mTorr to 60 mTorr.Type: ApplicationFiled: August 2, 2011Publication date: February 7, 2013Applicant: TOKYO ELECTRON LIMITEDInventor: Hiroyuki Takaba
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Publication number: 20120115334Abstract: Embodiments of the invention describe a method for forming dielectric films for semiconductor devices. The method includes providing a substrate in a process chamber containing a microwave plasma source, introducing into the process chamber a non-metal-containing process gas including a deposition gas having a carbon-nitrogen intermolecular bond, forming a plasma from the process gas, and exposing the substrate to the plasma to deposit carbon-nitrogen-containing film on the substrate. In some embodiments, the carbon-nitrogen-containing film can include a CN film, a CNO film, a Si-doped CN film, or a Si-doped CNO film.Type: ApplicationFiled: March 28, 2011Publication date: May 10, 2012Inventor: Hiroyuki Takaba
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Publication number: 20120098147Abstract: A method for manufacturing a semiconductor device having fluorocarbon layers as insulating layers includes the steps of forming a first fluorocarbon (CFx1) layer using plasma excited by microwave power and forming a second fluorocarbon (CFx2) layer using plasma excited by an RF power.Type: ApplicationFiled: June 25, 2010Publication date: April 26, 2012Applicant: TOKYO ELECTRON LIMITEDInventor: Hiroyuki Takaba
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Patent number: 7820503Abstract: An object of the present invention is to simplify manufacturing process of an n channel MIS transistor and a p channel MIS transistor with gate electrodes formed of a metal material. For its achievement, gate electrodes of each of the n channel MIS transistor and the p channel MIS transistor are simultaneously formed by patterning ruthenium film deposited on a gate insulator. Next, by introducing oxygen into each of the gate electrodes, the gate electrodes are transformed into those having high work function. Thereafter, by selectively reducing the gate electrode of the n channel MIS transistor, it is transformed into a gate electrode having low work function.Type: GrantFiled: July 30, 2008Date of Patent: October 26, 2010Assignees: Renesas Electronics Corporation, Tokyo Electron LimitedInventors: Toshihide Nabatame, Masaru Kadoshima, Hiroyuki Takaba
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Publication number: 20100175713Abstract: A method of cleaning a plasma processing apparatus for processing a target in a process container, which is vacuum-evacuatable, using plasma, includes performing a first cleaning process by supplying a cleaning gas into the process container to generate plasma and maintaining the pressure in the process container at a first pressure, and performing a second cleaning process by supplying a cleaning gas into the process container to generate plasma and maintaining the pressure in the process container at a second pressure that is higher than the first pressure. Accordingly, the plasma processing apparatus can be efficiently and rapidly cleaned without damaging at least one of the group consisting of inner surfaces of the process container and members in the process container.Type: ApplicationFiled: February 18, 2008Publication date: July 15, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Noriaki Fukiage, Shinji Komoto, Hiroyuki Takaba, Kiyotaka Ishibashi
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Patent number: 7511338Abstract: An object of the present invention is to simplify manufacturing process of an n channel MIS transistor and a p channel MIS transistor with gate electrodes formed of a metal material. For its achievement, gate electrodes of each of the n channel MIS transistor and the p channel MIS transistor are simultaneously formed by patterning ruthenium film deposited on a gate insulator. Next, by introducing oxygen into each of the gate electrodes, the gate electrodes are transformed into those having high work function. Thereafter, by selectively reducing the gate electrode of the n channel MIS transistor, it is transformed into a gate electrode having low work function.Type: GrantFiled: September 6, 2006Date of Patent: March 31, 2009Assignees: Renesas Technology Corp., Tokyo Electron LimitedInventors: Toshihide Nabatame, Masaru Kadoshima, Hiroyuki Takaba
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Publication number: 20080293229Abstract: An object of the present invention is to simplify manufacturing process of an n channel MIS transistor and a p channel MIS transistor with gate electrodes formed of a metal material. For its achievement, gate electrodes of each of the n channel MIS transistor and the p channel MIS transistor are simultaneously formed by patterning ruthenium film deposited on a gate insulator. Next, by introducing oxygen into each of the gate electrodes, the gate electrodes are transformed into those having high work function. Thereafter, by selectively reducing the gate electrode of the n channel MIS transistor, it is transformed into a gate electrode having low work function.Type: ApplicationFiled: July 30, 2008Publication date: November 27, 2008Inventors: Toshihide Nabatame, Masaru Kadoshima, Hiroyuki Takaba
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Publication number: 20070096157Abstract: An object of the present invention is to simplify manufacturing process of an n channel MIS transistor and a p channel MIS transistor with gate electrodes formed of a metal material. For its achievement, gate electrodes of each of the n channel MIS transistor and the p channel MIS transistor are simultaneously formed by patterning ruthenium film deposited on a gate insulator. Next, by introducing oxygen into each of the gate electrodes, the gate electrodes are transformed into those having high work function. Thereafter, by selectively reducing the gate electrode of the n channel MIS transistor, it is transformed into a gate electrode having low work function.Type: ApplicationFiled: September 6, 2006Publication date: May 3, 2007Inventors: Toshihide Nabatame, Masaru Kadoshima, Hiroyuki Takaba